Currently the decision of whether or not to use mrc_cache in recovery mode is made within the individual platforms' drivers (ie: fsp2.0, fsp1.1, etc.). As this is not platform specific, but uses common vboot infrastructure, the code can be unified and moved into mrc_cache. The conditions are as follows: 1. If HAS_RECOVERY_MRC_CACHE, use mrc_cache data (unless retrain switch is true) 2. If !HAS_RECOVERY_MRC_CACHE && VBOOT_STARTS_IN_BOOTBLOCK, this means that memory training will occur after verified boot, meaning that mrc_cache will be filled with data from executing RW code. So in this case, we never want to use the training data in the mrc_cache for recovery mode. 3. If !HAS_RECOVERY_MRC_CACHE && VBOOT_STARTS_IN_ROMSTAGE, this means that memory training happens before verfied boot, meaning that the mrc_cache data is generated by RO code, so it is safe to use for a recovery boot. 4. Any platform that does not use vboot should be unaffected. Additionally, we have removed the MRC_CLEAR_NORMAL_CACHE_ON_RECOVERY_RETRAIN config because the mrc_cache driver takes care of invalidating the mrc_cache data for normal mode. If the platform: 1. !HAS_RECOVERY_MRC_CACHE, always invalidate mrc_cache data 2. HAS_RECOVERY_MRC_CACHE, only invalidate if retrain switch is set BUG=b:150502246 BRANCH=None TEST=1. run dut-control power_state:rec_force_mrc twice on lazor ensure that memory retraining happens both times run dut-control power_state:rec twice on lazor ensure that memory retraining happens only first time 2. remove HAS_RECOVERY_MRC_CACHE from lazor Kconfig boot twice to ensure caching of memory training occurred on each boot. Change-Id: I3875a7b4a4ba3c1aa8a3c1507b3993036a7155fc Signed-off-by: Shelley Chen <shchen@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/46855 Reviewed-by: Furquan Shaikh <furquan@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
89 lines
1.8 KiB
Plaintext
89 lines
1.8 KiB
Plaintext
if BOARD_INTEL_ADLRVP_P || BOARD_INTEL_ADLRVP_P_EXT_EC
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config BOARD_SPECIFIC_OPTIONS
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def_bool y
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select BOARD_ROMSIZE_KB_32768
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select HAVE_ACPI_RESUME
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select HAVE_ACPI_TABLES
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select MAINBOARD_HAS_CHROMEOS
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select DRIVERS_I2C_HID
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select DRIVERS_I2C_GENERIC
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select DRIVERS_INTEL_SOUNDWIRE
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select DRIVERS_INTEL_PMC if BOARD_INTEL_ADLRVP_P_EXT_EC
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select DRIVERS_USB_ACPI
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select DRIVERS_SPI_ACPI
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select SOC_INTEL_ALDERLAKE
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select HAVE_SPD_IN_CBFS
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select DRIVERS_SOUNDWIRE_ALC711
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config CHROMEOS
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bool
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default y
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select GBB_FLAG_FORCE_DEV_SWITCH_ON
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select GBB_FLAG_FORCE_DEV_BOOT_USB
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select GBB_FLAG_FORCE_DEV_BOOT_LEGACY
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select GBB_FLAG_FORCE_MANUAL_RECOVERY
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select GBB_FLAG_DISABLE_PD_SOFTWARE_SYNC
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select HAS_RECOVERY_MRC_CACHE
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config MAINBOARD_DIR
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string
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default "intel/adlrvp"
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config VARIANT_DIR
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string
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default "adlrvp_p" if BOARD_INTEL_ADLRVP_P
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default "adlrvp_p_ext_ec" if BOARD_INTEL_ADLRVP_P_EXT_EC
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config GBB_HWID
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string
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depends on CHROMEOS
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default "ADLRVPP"
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config MAINBOARD_PART_NUMBER
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string
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default "adlrvp"
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config MAINBOARD_FAMILY
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string
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default "Intel_adlrvp"
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config OVERRIDE_DEVICETREE
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string
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default "variants/\$(CONFIG_VARIANT_DIR)/overridetree.cb"
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config DIMM_SPD_SIZE
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int
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default 512
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choice
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prompt "ON BOARD EC"
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default ADL_INTEL_EC if BOARD_INTEL_ADLRVP_P
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default ADL_CHROME_EC if BOARD_INTEL_ADLRVP_P_EXT_EC
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help
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This option allows you to select the on board EC to use.
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Select whether the board has Intel EC or Chrome EC
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config ADL_CHROME_EC
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bool "Chrome EC"
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select EC_GOOGLE_CHROMEEC
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select EC_GOOGLE_CHROMEEC_ESPI
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select EC_GOOGLE_CHROMEEC_BOARDID
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select EC_ACPI
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config ADL_INTEL_EC
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bool "Intel EC"
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select EC_ACPI
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select GBB_FLAG_DISABLE_EC_SOFTWARE_SYNC
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endchoice
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config VBOOT
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select VBOOT_LID_SWITCH
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select VBOOT_MOCK_SECDATA
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select HAS_RECOVERY_MRC_CACHE
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config UART_FOR_CONSOLE
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int
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default 0
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endif
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