Having some symmetry with <soc/nvs.h> now allows to reduce the amount of gluelogic to determine the size and cbmc field of struct global_nvs. Since GNVS creation is now controlled by ACPI_SOC_NVS, drivers/amd/agesa/nvs.c becomes obsolete and soc/amd/cezanne cannot have this selected until <soc/nvs.h> exists. Change-Id: Ia9ec853ff7f5e7908f7e8fc179ac27d0da08e19d Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/49344 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Lance Zhao
51 lines
1.3 KiB
C
51 lines
1.3 KiB
C
/* SPDX-License-Identifier: GPL-2.0-only */
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#include <arch/ioapic.h>
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#include <acpi/acpi.h>
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#include <acpi/acpi_gnvs.h>
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#include <arch/smp/mpspec.h>
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#include <device/device.h>
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#include <soc/nvs.h>
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void mainboard_fill_gnvs(struct global_nvs *gnvs)
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{
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gnvs->apic = 1;
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gnvs->mpen = 1; /* Enable Multi Processing */
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/* Enable both COM ports */
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gnvs->cmap = 0x01;
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gnvs->cmbp = 0x01;
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/* Temperature at which OS will shutdown */
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gnvs->tcrt = 100;
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/* Temperature at which OS will throttle CPU */
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gnvs->tpsv = 90;
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}
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unsigned long acpi_fill_madt(unsigned long current)
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{
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/* Local APICs */
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current = acpi_create_madt_lapics(current);
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/* IOAPIC */
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current += acpi_create_madt_ioapic((acpi_madt_ioapic_t *) current,
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2, IO_APIC_ADDR, 0);
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/* LAPIC_NMI */
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current += acpi_create_madt_lapic_nmi((acpi_madt_lapic_nmi_t *)
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current, 0,
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MP_IRQ_POLARITY_HIGH |
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MP_IRQ_TRIGGER_EDGE, 0x01);
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current += acpi_create_madt_lapic_nmi((acpi_madt_lapic_nmi_t *)
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current, 1, MP_IRQ_POLARITY_HIGH |
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MP_IRQ_TRIGGER_EDGE, 0x01);
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/* INT_SRC_OVR */
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current += acpi_create_madt_irqoverride((acpi_madt_irqoverride_t *)
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current, 0, 0, 2, MP_IRQ_POLARITY_HIGH | MP_IRQ_TRIGGER_EDGE);
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current += acpi_create_madt_irqoverride((acpi_madt_irqoverride_t *)
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current, 0, 9, 9, MP_IRQ_POLARITY_HIGH | MP_IRQ_TRIGGER_LEVEL);
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return current;
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}
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