661ad4666c
Having some symmetry with <soc/nvs.h> now allows to reduce the amount of gluelogic to determine the size and cbmc field of struct global_nvs. Since GNVS creation is now controlled by ACPI_SOC_NVS, drivers/amd/agesa/nvs.c becomes obsolete and soc/amd/cezanne cannot have this selected until <soc/nvs.h> exists. Change-Id: Ia9ec853ff7f5e7908f7e8fc179ac27d0da08e19d Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/49344 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Lance Zhao
157 lines
3.2 KiB
C
157 lines
3.2 KiB
C
/* SPDX-License-Identifier: GPL-2.0-only */
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#include <arch/io.h>
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#include <device/pci_ops.h>
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#include <console/console.h>
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#include <cpu/x86/smm.h>
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#include <soc/nvs.h>
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#include <southbridge/intel/common/pmutil.h>
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#include <ec/acpi/ec.h>
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#include <option.h>
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#include <ec/lenovo/h8/h8.h>
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#include <delay.h>
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#include "dock.h"
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#include "smi.h"
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#define GPE_EC_SCI 12
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static void mainboard_smi_save_cmos(void)
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{
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u8 val;
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u8 tmp70, tmp72;
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tmp70 = inb(0x70);
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tmp72 = inb(0x72);
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val = pci_read_config8(PCI_DEV(0, 2, 1), 0xf4);
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set_option("tft_brightness", &val);
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val = ec_read(H8_VOLUME_CONTROL);
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set_option("volume", &val);
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outb(tmp70, 0x70);
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outb(tmp72, 0x72);
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}
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int mainboard_io_trap_handler(int smif)
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{
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switch (smif) {
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case SMI_DOCK_CONNECT:
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ec_clr_bit(0x03, 2);
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mdelay(250);
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if (!dock_connect()) {
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ec_set_bit(0x03, 2);
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/* set dock LED to indicate status */
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ec_write(0x0c, 0x09);
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ec_write(0x0c, 0x88);
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} else {
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/* blink dock LED to indicate failure */
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ec_write(0x0c, 0x08);
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ec_write(0x0c, 0xc9);
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}
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break;
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case SMI_DOCK_DISCONNECT:
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ec_clr_bit(0x03, 2);
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dock_disconnect();
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break;
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case SMI_SAVE_CMOS:
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mainboard_smi_save_cmos();
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break;
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default:
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return 0;
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}
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/* On success, the IO Trap Handler returns 1
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* On failure, the IO Trap Handler returns a value != 1 */
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return 1;
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}
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static void mainboard_smi_brightness_up(void)
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{
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u8 value;
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if ((value = pci_read_config8(PCI_DEV(0, 2, 1), 0xf4)) < 0xf0)
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pci_write_config8(PCI_DEV(0, 2, 1), 0xf4, (value + 0x10) | 0xf);
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}
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static void mainboard_smi_brightness_down(void)
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{
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u8 value;
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if ((value = pci_read_config8(PCI_DEV(0, 2, 1), 0xf4)) > 0x10)
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pci_write_config8(PCI_DEV(0, 2, 1), 0xf4, (value - 0x10) & 0xf0);
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}
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static void mainboard_smi_handle_ec_sci(void)
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{
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u8 status = inb(EC_SC);
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u8 event;
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if (!(status & EC_SCI_EVT))
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return;
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event = ec_query();
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printk(BIOS_DEBUG, "EC event %#02x\n", event);
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switch (event) {
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/* brightness up */
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case 0x14:
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mainboard_smi_brightness_up();
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mainboard_smi_save_cmos();
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break;
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/* brightness down */
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case 0x15:
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mainboard_smi_brightness_down();
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mainboard_smi_save_cmos();
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break;
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/* Fn-F9 key */
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case 0x18:
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/* Power loss */
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case 0x27:
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/* Undock Key */
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case 0x50:
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mainboard_io_trap_handler(SMI_DOCK_DISCONNECT);
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break;
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/* Dock Event */
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case 0x37:
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case 0x58:
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mainboard_io_trap_handler(SMI_DOCK_CONNECT);
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break;
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default:
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break;
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}
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}
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void mainboard_smi_gpi(u32 gpi)
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{
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if (gpi & (1 << GPE_EC_SCI))
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mainboard_smi_handle_ec_sci();
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}
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int mainboard_smi_apmc(u8 data)
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{
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switch (data) {
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case APM_CNT_ACPI_ENABLE:
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/* use 0x1600/0x1604 to prevent races with userspace */
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ec_set_ports(0x1604, 0x1600);
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/* route H8SCI to SCI */
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gpi_route_interrupt(GPE_EC_SCI, GPI_IS_SCI);
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/* discard all events, and enable attention */
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ec_write(0x80, 0x01);
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break;
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case APM_CNT_ACPI_DISABLE:
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/* we have to use port 0x62/0x66, as 0x1600/0x1604 doesn't
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provide a EC query function */
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ec_set_ports(0x66, 0x62);
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/* route H8SCI# to SMI */
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gpi_route_interrupt(GPE_EC_SCI, GPI_IS_SMI);
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/* discard all events, and enable attention */
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ec_write(0x80, 0x01);
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break;
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default:
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break;
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}
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return 0;
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}
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