662da6cf7b
Refactor the code and split it into Xeon common and CPU-specific code. Move most Skylake-SP code into skx/ and keep common code in the current folder. This is a preparation for future work that will enable next generation server CPU. TEST=Tested on OCP Tioga Pass. There does not seem to be degradation of stability as far as I could tell. Signed-off-by: Andrey Petrov <anpetrov@fb.com> Change-Id: I448e6cfd6a85efb83d132ad26565557fe55a265a Reviewed-on: https://review.coreboot.org/c/coreboot/+/39601 Reviewed-by: David Hendricks <david.hendricks@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
29 lines
933 B
Makefile
29 lines
933 B
Makefile
##
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## This file is part of the coreboot project.
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##
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##
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## This program is free software; you can redistribute it and/or modify
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## it under the terms of the GNU General Public License as published by
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## the Free Software Foundation; either version 2 of the License, or
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## (at your option) any later version.
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##
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## This program is distributed in the hope that it will be useful,
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## but WITHOUT ANY WARRANTY; without even the implied warranty of
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## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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## GNU General Public License for more details.
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##
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ifeq ($(CONFIG_XEON_SP_COMMON_BASE),y)
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subdirs-$(CONFIG_SOC_INTEL_SKYLAKE_SP) += skx
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bootblock-y += bootblock.c spi.c lpc.c
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romstage-y += romstage.c reset.c util.c spi.c
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ramstage-y += uncore.c reset.c util.c lpc.c spi.c
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postcar-y += spi.c
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CPPFLAGS_common += -I$(src)/soc/intel/xeon_sp/include
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CPPFLAGS_common += -I$(CONFIG_FSP_HEADER_PATH)
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endif ## XEON_SP_COMMON_BASE
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