66bea528cf
This was tested at the coreboot meeting in Berlin. The uart programming may still not be right but when used with the lowrisc bitstream for the board we were able to load and start linux, although it does not yet get far due to PTE version issues with lowrisc. Change-Id: Ia1de1a92762631c9d7bb3d41b04f95296144caa3 Signed-off-by: Ronald G. Minnich <rminnich@gmail.com> Reviewed-on: https://review.coreboot.org/17132 Reviewed-by: Aaron Durbin <adurbin@chromium.org> Tested-by: build bot (Jenkins)
39 lines
1006 B
Plaintext
39 lines
1006 B
Plaintext
##
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## This file is part of the coreboot project.
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##
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## Copyright (C) 2016 Google Inc.
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##
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## This software is licensed under the terms of the GNU General Public
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## License version 2, as published by the Free Software Foundation, and
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## may be copied, distributed, and modified under those terms.
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##
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## This program is distributed in the hope that it will be useful,
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## but WITHOUT ANY WARRANTY; without even the implied warranty of
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## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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## GNU General Public License for more details.
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if BOARD_LOWRISC_NEXYS4DDR
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config BOARD_SPECIFIC_OPTIONS # dummy
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def_bool y
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select SOC_LOWRISC_LOWRISC
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select BOARD_ROMSIZE_KB_4096
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select DRIVERS_UART_8250MEM
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select BOOT_DEVICE_NOT_SPI_FLASH
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select UART_OVERRIDE_REFCLK
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select UART_OVERRIDE_INPUT_CLOCK_DIVIDER
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config MAINBOARD_DIR
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string
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default lowrisc/nexys4ddr
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config MAINBOARD_PART_NUMBER
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string
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default "LOWRISC NEXYS4DDR"
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config MAX_CPUS
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int
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default 1
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endif # BOARD_LOWRISC_NEXYS4DDR
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