66c6413c69
The layout of GNVS has expectation for a fixed size array for chromeos_acpi_t. This allows us to reduce the exposure of <chromeos/gnvs.h>. If chromeos_acpi_t was the last entry in struct global_nvs padding at the end is also removed. If device_nvs_t exists, place a properly sized reserve for chromeos_acpi_t in the middle. Allocation from cbmem is adjusted such that it matches exactly the OperationRegion size defined inside the ASL. Change-Id: If234075e11335ce958ce136dd3fe162f7e5afdf7 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/48788 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
28 lines
656 B
C
28 lines
656 B
C
/* SPDX-License-Identifier: GPL-2.0-only */
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#ifndef __ACPI_GNVS_H__
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#define __ACPI_GNVS_H__
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#include <types.h>
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void *acpi_get_gnvs(void);
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void *gnvs_get_or_create(void);
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void gnvs_assign_chromeos(void *gnvs_section);
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void gnvs_set_ecfw_rw(void);
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/* Platform code must implement these. */
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struct global_nvs;
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size_t gnvs_size_of_array(void);
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uint32_t *gnvs_cbmc_ptr(struct global_nvs *gnvs);
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/*
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* These functions populate the gnvs structure in acpi table.
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* Defined as weak in common acpi as gnvs structure definition is
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* chipset specific.
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*/
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void soc_fill_gnvs(struct global_nvs *gnvs);
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void mainboard_fill_gnvs(struct global_nvs *gnvs);
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#endif
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