system76-coreboot

Files

Nick Vaccaro 687b023d97 google/zoombini: adapt to schematic changes

Adapt code to latest schematic changes, revision 1.1.

Configure GPD2 for EC_PCH_WAKE_ODL,
        GPP_D5 for EC_I2C_SENSOR_SDA,
        GPP_D6 for EC_I2C_SENSOR_SCL,
        GPP_D7 for WWAN_SAR_INT_ODL,
        GPP_D9 for touchscreen power enable,
        GPP_D10 for wifi power enable,
        GPP_D11 for wwan power enable,
        GPP_D13 change to "No Connect" (was VOL_UP_ODL),
        GPP_D14 change to "No Connect" (was VOL_DOWN_ODL).

BUG=b:66265441
BRANCH=None
TEST=None

Change-Id: Ic9e76ed3e958c1f96deb6356d6480c6ba7cfe699
Signed-off-by: Nick Vaccaro <nvaccaro@google.com>
Reviewed-on: https://review.coreboot.org/21900
Reviewed-by: Furquan Shaikh <furquan@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>

2017-10-06 18:11:24 +00:00

acpi

src/acpi: Add guards on all header files

2017-08-01 23:04:27 +00:00

arch

arch/riscv: hls_init: Initialize time{,cmp} with dummy pointers

2017-09-27 16:41:03 +00:00

commonlib

commonlib: Consistently spell *romstage* without space

2017-09-27 22:20:25 +00:00

console

console: Ignore loglevel in nvram until ramstage