Files
system76-coreboot/src
Jeremy Soller 6886306549 soc/intel/adl: Fill in SPD data on both channels of DDR5 memory
CB:52731 introduced support for reading SPD from the EEPROM via SMBus.
Replace the now unneeded workaround for DDR5 with filling in the correct
channels for DDR5.

Change-Id: I5a92199a7cd2718e9396f0dac8257df40e4f834c
Signed-off-by: Jeremy Soller <jeremy@system76.com>
Signed-off-by: Tim Crawford <tcrawford@system76.com>
2024-06-03 14:55:40 -06:00
..
2024-05-29 10:33:54 +00:00
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2024-05-29 10:33:54 +00:00
2024-05-29 10:33:54 +00:00