69ababcbf6
Use coreboot's native PCI access functions instead of using the vendorcode's PCI access functions to set up the CPU IO routing in function 1 of the HT PCI device. This file still has room for improvement, but at least it's now using coreboot-native functionality. Stoneyridge has a nicer implementation, but looking into possibly unifying those is out of scope for this patch. TEST=None Signed-off-by: Felix Held <felix-coreboot@felixheld.de> Change-Id: Ieecc0e5f6576a838d79220b061de81e21b5d976c Reviewed-on: https://review.coreboot.org/c/coreboot/+/74616 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Martin Roth <martin.roth@amd.corp-partner.google.com>