The parallel mp code picks up lapics at runtime, so remove it from all devicetrees that use this codebase. Change-Id: I5258a769c0f0ee4bbc4facc19737eed187b68c73 Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-on: https://review.coreboot.org/c/coreboot/+/69303 Reviewed-by: Elyes Haouas <ehaouas@noos.fr> Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
113 lines
4.3 KiB
Plaintext
113 lines
4.3 KiB
Plaintext
chip soc/intel/braswell
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############################################################
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# Set the parameters for MemoryInit
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############################################################
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register "PcdMrcInitSpdAddr1" = "0xa0"
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register "PcdMrcInitSpdAddr2" = "0xa2"
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register "PcdIgdDvmt50PreAlloc" = "IGD_MEMSIZE_32MB"
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register "PcdDvfsEnable" = "0"
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register "PcdCaMirrorEn" = "1"
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############################################################
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# Set the parameters for SiliconInit
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############################################################
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register "PcdSdcardMode" = "PCH_DISABLED"
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register "PcdEnableHsuart0" = "0"
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register "PcdEnableHsuart1" = "0"
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register "PcdEnableAzalia" = "1"
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register "PcdEnableXhci" = "1"
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register "PcdEnableLpe" = "0"
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register "PcdEnableDma0" = "0"
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register "PcdEnableDma1" = "0"
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register "PcdEnableI2C0" = "0"
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register "PcdEnableI2C1" = "0"
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register "PcdEnableI2C2" = "0"
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register "PcdEnableI2C3" = "0"
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register "PcdEnableI2C4" = "0"
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register "PcdEnableI2C5" = "0"
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register "PcdEnableI2C6" = "0"
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register "PunitPwrConfigDisable" = "0" # Enable SVID
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register "ChvSvidConfig" = "1"
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register "PcdEmmcMode" = "PCH_PCI_MODE"
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register "PcdEnableSata" = "1"
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register "Usb2Port0PerPortPeTxiSet" = "7"
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register "Usb2Port0PerPortTxiSet" = "5"
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register "Usb2Port0IUsbTxEmphasisEn" = "2"
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register "Usb2Port0PerPortTxPeHalf" = "1"
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register "Usb2Port1PerPortPeTxiSet" = "7"
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register "Usb2Port1PerPortTxiSet" = "3"
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register "Usb2Port1IUsbTxEmphasisEn" = "2"
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register "Usb2Port1PerPortTxPeHalf" = "1"
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register "Usb2Port2PerPortPeTxiSet" = "7"
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register "Usb2Port2PerPortTxiSet" = "3"
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register "Usb2Port2IUsbTxEmphasisEn" = "2"
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register "Usb2Port2PerPortTxPeHalf" = "1"
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register "Usb2Port3PerPortPeTxiSet" = "7"
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register "Usb2Port3PerPortTxiSet" = "3"
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register "Usb2Port3IUsbTxEmphasisEn" = "2"
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register "Usb2Port3PerPortTxPeHalf" = "1"
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register "Usb2Port4PerPortPeTxiSet" = "7"
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register "Usb2Port4PerPortTxiSet" = "3"
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register "Usb2Port4IUsbTxEmphasisEn" = "2"
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register "Usb2Port4PerPortTxPeHalf" = "1"
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register "Usb3Lane0Ow2tapgen2deemph3p5" = "0x3a"
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register "Usb3Lane1Ow2tapgen2deemph3p5" = "0x64"
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register "Usb3Lane2Ow2tapgen2deemph3p5" = "0x64"
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register "Usb3Lane3Ow2tapgen2deemph3p5" = "0x3a"
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register "PcdPchSsicEnable" = "1"
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register "PMIC_I2CBus" = "0"
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register "ISPEnable" = "0" # Disable IUNIT
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register "ISPPciDevConfig" = "3"
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register "PcdSdDetectChk" = "0" # Disable SD card detect
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register "DptfDisable" = "1"
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# LPE audio codec settings
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register "lpe_codec_clk_src" = "LPE_CLK_SRC_XTAL" # 19.2MHz clock
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# Enable devices in PCI mode
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register "lpss_acpi_mode" = "0"
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register "emmc_acpi_mode" = "0"
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register "sd_acpi_mode" = "0"
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register "lpe_acpi_mode" = "0"
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# Disable SLP_X stretching after SUS power well fail.
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register "disable_slp_x_stretch_sus_fail" = "1"
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# Allow PCIe devices to wake system from suspend
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register "pcie_wake_enable" = "1"
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device cpu_cluster 0 on end
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device domain 0 on
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device pci 00.0 on end # 8086 2280 - SoC router
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device pci 02.0 on end # 8086 22B1 - GFX
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device pci 0b.0 off end # 8086 22DC - PUNIT/DPTF
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device pci 10.0 on end # 8086 2294 - MMC Port
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device pci 12.0 on end # 8086 0F16 - SD Port
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device pci 13.0 on end # 8086 22a3 - SATA Port
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device pci 14.0 on end # 8086 22b5 - USB XHCI - Only 1 USB controller at a time
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device pci 18.0 off end # 8086 22c0 - SIO - DMA
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device pci 18.1 off end # 8086 22c1 - I2C Port 1
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device pci 18.2 off end # 8086 22c2 - I2C Port 2
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device pci 18.3 off end # 8086 22c3 - I2C Port 3
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device pci 18.4 off end # 8086 22c4 - I2C Port 4
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device pci 18.5 off end # 8086 22c5 - I2C Port 5
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device pci 18.6 off end # 8086 22c6 - I2C Port 6
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device pci 18.7 off end # 8086 22c7 - I2C Port 7
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device pci 1a.0 on end # 8086 2298 - Trusted Execution Engine
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device pci 1b.0 on end # 8086 2284 - HD Audio
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device pci 1c.0 on end # 8086 0000 - PCIe Root Port 1
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device pci 1c.1 on end # 8086 0000 - PCIe Root Port 2
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device pci 1c.2 on end # 8086 0000 - PCIe Root Port 3
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device pci 1c.3 on end # 8086 0000 - PCIe Root Port 4
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device pci 1e.0 off end # 8086 2286 - SIO - DMA
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device pci 1e.3 off end # 8086 228a - HSUART 1
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device pci 1e.4 off end # 8086 228c - HSUART 2
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device pci 1f.0 on end # 8086 229c - LPC bridge
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device pci 1f.3 on end # 8086 2292 - SMBus 0
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end
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end
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