6a01563d06
Also, remove unnecessary junk and prepare for future build changes. Change-Id: I143777ec7e67ea4d6fed00084aafcb94c7866b4d Signed-off-by: Ronald G. Minnich <rminnich@gmail.com> Reviewed-on: http://review.coreboot.org/2141 Reviewed-by: David Hendricks <dhendrix@chromium.org> Tested-by: build bot (Jenkins)
93 lines
2.8 KiB
PHP
93 lines
2.8 KiB
PHP
/*
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* Early initialization code for ARMv7 architecture.
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*
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* This file is based off of the OMAP3530/ARM Cortex start.S file from Das
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* U-Boot, which itself got the file from armboot.
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*
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* Copyright (c) 2004 Texas Instruments <r-woodruff2@ti.com>
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* Copyright (c) 2001 Marius Gröger <mag@sysgo.de>
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* Copyright (c) 2002 Alex Züpke <azu@sysgo.de>
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* Copyright (c) 2002 Gary Jennejohn <garyj@denx.de>
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* Copyright (c) 2003 Richard Woodruff <r-woodruff2@ti.com>
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* Copyright (c) 2003 Kshitij <kshitij@ti.com>
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* Copyright (c) 2006-2008 Syed Mohammed Khasim <x0khasim@ti.com>
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* Copyright (c) 2013 The Chromium OS Authors
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; version 2 of
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* the License.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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#include <system.h>
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_bl1:
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/* For now we have to live with a first stage boot loader
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* on ARM, which is 8KB in size and it is prepended to the
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* reset vector
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*/
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/* this comes a bit later. */
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// .skip 8192
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.globl _start
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_start: b reset
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.balignl 16,0xdeadbeef
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_cbfs_master_header:
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/* The CBFS master header is inserted here by cbfstool
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* when coreboot.rom is being created. Hence, we leave
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* some space for it.
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*/
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.skip 64
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reset:
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/*
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* set the cpu to SVC32 mode
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*/
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mrs r0, cpsr
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bic r0, r0, #0x1f
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orr r0, r0, #0xd3
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msr cpsr,r0
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/*
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* From Cortex-A Series Programmer's Guide:
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* Only CPU 0 performs initialization. Other CPUs go into WFI
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* to do this, first work out which CPU this is
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* this code typically is run before any other initialization step
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*/
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mrc p15, 0, r1, c0, c0, 5 @ Read Multiprocessor Affinity Register
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and r1, r1, #0x3 @ Extract CPU ID bits
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cmp r1, #0
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bne wait_for_interrupt @ If this is not core0, wait
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/* Set stackpointer in internal RAM to call board_init_f */
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call_bootblock:
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ldr sp, =(CONFIG_SYS_INIT_SP_ADDR) /* Set up stack pointer */
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bic sp, sp, #7 /* 8-byte alignment for ABI compliance */
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ldr r0,=0x00000000
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/*
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* Use "bl" instead of "b" even though we do not intend to return.
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* "bl" gets compiled to "blx" if we're transitioning from ARM to
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* Thumb. However, "b" will not and GCC may attempt to create a
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* wrapper which is currently broken.
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*/
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/* for now call board_init_f; change later. We're trying to get as much into ToT as
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* we can
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*/
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bl board_init_f
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bl main
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wait_for_interrupt:
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wfi
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mov pc, lr @ back to my caller
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