Paul Menzel 6a70dbc397 cpu/x86/mtrr: Add MTRR index and total MTRRs to error message ...

Change-Id: I626a11c17c9d05c174c507d50684e498c8604cbc
Signed-off-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-on: http://review.coreboot.org/11905
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Tested-by: build bot (Jenkins)
Reviewed-by: Nico Huber <nico.h@gmx.de>

2015-10-15 23:31:38 +00:00

..

acpi

acpi/sata: add generic sata ssdt port generator

2015-06-07 01:24:47 +02:00

arch

x86: add standalone verstage support

2015-10-14 17:07:52 +00:00

commonlib

vboot: prepare for x86 verstage

2015-10-11 23:57:29 +00:00

console

x86: add standalone verstage support

2015-10-14 17:07:52 +00:00

cpu

cpu/x86/mtrr: Add MTRR index and total MTRRs to error message

2015-10-15 23:31:38 +00:00

device

x86: add standalone verstage support

2015-10-14 17:07:52 +00:00

drivers

cpu/mtrr.h: Fix macro names for MTRR registers

2015-10-15 03:52:49 +00:00

ec

ec/google: Move label to BOL to satisfy lint-tests

2015-10-15 07:36:26 +00:00

include

cpu/mtrr.h: Fix macro names for MTRR registers

2015-10-15 03:52:49 +00:00

lib

x86: add standalone verstage support

2015-10-14 17:07:52 +00:00

mainboard

pcengines/apu1: Fill serial number in SMBIOS

2015-10-15 12:11:05 +00:00

northbridge

cpu/mtrr.h: Fix macro names for MTRR registers

2015-10-15 03:52:49 +00:00

soc

soc/intel/broadwell: fix USBDEBUG copy-pasta

2015-10-15 17:48:17 +00:00

southbridge

Revert "Remove FSP Rangeley SOC and mohonpeak board support"

2015-10-14 22:49:03 +00:00

superio

superio/smsc: Add support for SMSC DME1737

2015-07-13 17:11:00 +02:00

vendorcode

Revert "Remove FSP Rangeley SOC and mohonpeak board support"

2015-10-14 22:49:03 +00:00

Kconfig

Kconfig: Hide RAM_CODE_SUPPORT.

2015-10-11 15:34:37 +00:00