6a8ce0d250
The file cache_as_ram_ht.inc is used across a variety of CPUs and northbridges. We need to split it anyway for future C_ENVIRONMENT_BOOTBLOCK and verstage work. Split and rename the files, remove code that is globally implemented in POSTCAR_STAGE framework already. Change-Id: I2ba67772328fce3d5d1ae34c36aea8dcdcc56b87 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/26747 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-by: Aaron Durbin <adurbin@chromium.org>
23 lines
623 B
Makefile
23 lines
623 B
Makefile
subdirs-y += ../model_6fx
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subdirs-y += ../model_f3x
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subdirs-y += ../model_f4x
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#subdirs-y += ../model_f6x
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#subdirs-y += ../model_1066x
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subdirs-y += ../model_1067x
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subdirs-y += ../../x86/tsc
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subdirs-y += ../../x86/mtrr
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subdirs-y += ../../x86/lapic
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subdirs-y += ../../x86/cache
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subdirs-y += ../../x86/smm
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subdirs-y += ../microcode
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subdirs-y += ../hyperthreading
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subdirs-y += ../speedstep
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ifneq ($(CONFIG_POSTCAR_STAGE),y)
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cpu_incs-y += $(src)/cpu/intel/car/cache_as_ram_ht.inc
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else
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cpu_incs-y += $(src)/cpu/intel/car/p4-netburst/cache_as_ram.S
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postcar-y += ../car/p4-netburst/exit_car.S
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endif
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romstage-y += ../car/romstage.c
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