system76-coreboot

Files

Arthur Heymans 1410224cf4 soc/intel/xeon_sp: Use common cpu/intel romstage entry

This removes some boilerplate like starting the console and also adds
a "start of romstage" timestamp.

Change-Id: Ie85df5d244fa37c41f0b3177ca325c607fa54593
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/46658
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>

2020-11-05 00:02:07 +00:00

amd

soc/amd/common/psp: move v1-only mailbox commands to separate section

2020-11-04 19:37:42 +00:00

cavium

soc/cavium: Drop unneeded empty lines

2020-09-22 17:14:49 +00:00

example

x86: Add a minimal example SoC along with a board

2020-10-30 21:34:18 +00:00

intel

soc/intel/xeon_sp: Use common cpu/intel romstage entry