732f5b5597
By default we dont want to use the special DC instruction. Thus getting rid of the DONT_USE_DC macro and enabling code appropriately in memset.S BUG=chrome-os-partner:31634 BRANCH=None TEST=Compiles successfully and memset works fine for mmu init Change-Id: Icb3193f4f0d122726dcdacbdcacbf53eba30e235 Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Original-Commit-Id: 54f639ef2348acab54e32b18f6826a67bf52bc14 Original-Change-Id: Id89ec2c1731d21496eca617a3c03abaf48062908 Original-Signed-off-by: Furquan Shaikh <furquan@google.com> Original-Reviewed-on: https://chromium-review.googlesource.com/216820 Original-Tested-by: Furquan Shaikh <furquan@chromium.org> Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org> Original-Commit-Queue: Furquan Shaikh <furquan@chromium.org> Reviewed-on: http://review.coreboot.org/8787 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
137 lines
3.6 KiB
ArmAsm
137 lines
3.6 KiB
ArmAsm
/* Copyright (c) 2012-2013, Linaro Limited
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All rights reserved.
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Redistribution and use in source and binary forms, with or without
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modification, are permitted provided that the following conditions are met:
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* Redistributions of source code must retain the above copyright
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notice, this list of conditions and the following disclaimer.
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* Redistributions in binary form must reproduce the above copyright
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notice, this list of conditions and the following disclaimer in the
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documentation and/or other materials provided with the distribution.
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* Neither the name of the Linaro nor the
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names of its contributors may be used to endorse or promote products
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derived from this software without specific prior written permission.
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THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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"AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES ; LOSS OF USE,
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DATA, OR PROFITS ; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */
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/* Assumptions:
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*
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* ARMv8-a, AArch64
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* Unaligned accesses
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*
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*/
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#define dstin x0
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#define val w1
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#define count x2
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#define tmp1 x3
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#define tmp1w w3
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#define tmp2 x4
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#define tmp2w w4
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#define zva_len_x x5
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#define zva_len w5
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#define zva_bits_x x6
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#define A_l x7
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#define A_lw w7
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#define dst x8
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#define tmp3w w9
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.macro def_fn f p2align=0
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.text
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.p2align \p2align
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.global \f
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.type \f, %function
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\f:
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.endm
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def_fn memset p2align=6
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mov dst, dstin /* Preserve return value. */
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ands A_lw, val, #255
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orr A_lw, A_lw, A_lw, lsl #8
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orr A_lw, A_lw, A_lw, lsl #16
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orr A_l, A_l, A_l, lsl #32
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.Ltail_maybe_long:
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cmp count, #64
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b.ge .Lnot_short
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.Ltail_maybe_tiny:
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cmp count, #15
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b.le .Ltail15tiny
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.Ltail63:
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ands tmp1, count, #0x30
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b.eq .Ltail15
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add dst, dst, tmp1
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cmp tmp1w, #0x20
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b.eq 1f
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b.lt 2f
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stp A_l, A_l, [dst, #-48]
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1:
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stp A_l, A_l, [dst, #-32]
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2:
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stp A_l, A_l, [dst, #-16]
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.Ltail15:
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and count, count, #15
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add dst, dst, count
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stp A_l, A_l, [dst, #-16] /* Repeat some/all of last store. */
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ret
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.Ltail15tiny:
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/* Set up to 15 bytes. Does not assume earlier memory
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being set. */
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tbz count, #3, 1f
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str A_l, [dst], #8
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1:
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tbz count, #2, 1f
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str A_lw, [dst], #4
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1:
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tbz count, #1, 1f
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strh A_lw, [dst], #2
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1:
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tbz count, #0, 1f
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strb A_lw, [dst]
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1:
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ret
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/* Critical loop. Start at a new cache line boundary. Assuming
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* 64 bytes per line, this ensures the entire loop is in one line. */
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.p2align 6
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.Lnot_short:
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neg tmp2, dst
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ands tmp2, tmp2, #15
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b.eq 2f
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/* Bring DST to 128-bit (16-byte) alignment. We know that there's
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* more than that to set, so we simply store 16 bytes and advance by
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* the amount required to reach alignment. */
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sub count, count, tmp2
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stp A_l, A_l, [dst]
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add dst, dst, tmp2
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/* There may be less than 63 bytes to go now. */
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cmp count, #63
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b.le .Ltail63
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2:
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sub dst, dst, #16 /* Pre-bias. */
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sub count, count, #64
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1:
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stp A_l, A_l, [dst, #16]
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stp A_l, A_l, [dst, #32]
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stp A_l, A_l, [dst, #48]
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stp A_l, A_l, [dst, #64]!
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subs count, count, #64
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b.ge 1b
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tst count, #0x3f
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add dst, dst, #16
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b.ne .Ltail63
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ret
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