6b5bc77c9b
Stefan thinks they don't add value. Command used: sed -i -e '/file is part of /d' $(git grep "file is part of " |egrep ":( */\*.*\*/\$|#|;#|-- | *\* )" | cut -d: -f1 |grep -v crossgcc |grep -v gcov | grep -v /elf.h |grep -v nvramtool) The exceptions are for: - crossgcc (patch file) - gcov (imported from gcc) - elf.h (imported from GNU's libc) - nvramtool (more complicated header) The removed lines are: - fmt.Fprintln(f, "/* This file is part of the coreboot project. */") -# This file is part of a set of unofficial pre-commit hooks available -/* This file is part of coreboot */ -# This file is part of msrtool. -/* This file is part of msrtool. */ - * This file is part of ncurses, designed to be appended after curses.h.in -/* This file is part of pgtblgen. */ - * This file is part of the coreboot project. - /* This file is part of the coreboot project. */ -# This file is part of the coreboot project. -# This file is part of the coreboot project. -## This file is part of the coreboot project. --- This file is part of the coreboot project. -/* This file is part of the coreboot project */ -/* This file is part of the coreboot project. */ -;## This file is part of the coreboot project. -# This file is part of the coreboot project. It originated in the - * This file is part of the coreinfo project. -## This file is part of the coreinfo project. - * This file is part of the depthcharge project. -/* This file is part of the depthcharge project. */ -/* This file is part of the ectool project. */ - * This file is part of the GNU C Library. - * This file is part of the libpayload project. -## This file is part of the libpayload project. -/* This file is part of the Linux kernel. */ -## This file is part of the superiotool project. -/* This file is part of the superiotool project */ -/* This file is part of uio_usbdebug */ Change-Id: I82d872b3b337388c93d5f5bf704e9ee9e53ab3a9 Signed-off-by: Patrick Georgi <pgeorgi@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/41194 Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
65 lines
1.6 KiB
C
65 lines
1.6 KiB
C
/* SPDX-License-Identifier: GPL-2.0-only */
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#include <stdint.h>
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#include <arch/bootblock.h>
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#include <cpu/x86/msr.h>
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#include <cpu/x86/mtrr.h>
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#include <arch/io.h>
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#include <halt.h>
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#include "haswell.h"
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#include <southbridge/intel/lynxpoint/pch.h>
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static void set_flex_ratio_to_tdp_nominal(void)
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{
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msr_t flex_ratio, msr;
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u32 soft_reset;
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u8 nominal_ratio;
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/* Check for Flex Ratio support */
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flex_ratio = rdmsr(MSR_FLEX_RATIO);
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if (!(flex_ratio.lo & FLEX_RATIO_EN))
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return;
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/* Check for >0 configurable TDPs */
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msr = rdmsr(MSR_PLATFORM_INFO);
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if (((msr.hi >> 1) & 3) == 0)
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return;
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/* Use nominal TDP ratio for flex ratio */
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msr = rdmsr(MSR_CONFIG_TDP_NOMINAL);
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nominal_ratio = msr.lo & 0xff;
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/* See if flex ratio is already set to nominal TDP ratio */
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if (((flex_ratio.lo >> 8) & 0xff) == nominal_ratio)
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return;
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/* Set flex ratio to nominal TDP ratio */
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flex_ratio.lo &= ~0xff00;
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flex_ratio.lo |= nominal_ratio << 8;
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flex_ratio.lo |= FLEX_RATIO_LOCK;
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wrmsr(MSR_FLEX_RATIO, flex_ratio);
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/* Set flex ratio in soft reset data register bits 11:6.
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* RCBA region is enabled in southbridge bootblock */
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soft_reset = RCBA32(SOFT_RESET_DATA);
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soft_reset &= ~(0x3f << 6);
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soft_reset |= (nominal_ratio & 0x3f) << 6;
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RCBA32(SOFT_RESET_DATA) = soft_reset;
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/* Set soft reset control to use register value */
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RCBA32_OR(SOFT_RESET_CTRL, 1);
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/* Issue warm reset, will be "CPU only" due to soft reset data */
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outb(0x0, 0xcf9);
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outb(0x6, 0xcf9);
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halt();
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}
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void bootblock_early_cpu_init(void)
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{
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/* Set flex ratio and reset if needed */
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set_flex_ratio_to_tdp_nominal();
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}
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