6b5bc77c9b
Stefan thinks they don't add value. Command used: sed -i -e '/file is part of /d' $(git grep "file is part of " |egrep ":( */\*.*\*/\$|#|;#|-- | *\* )" | cut -d: -f1 |grep -v crossgcc |grep -v gcov | grep -v /elf.h |grep -v nvramtool) The exceptions are for: - crossgcc (patch file) - gcov (imported from gcc) - elf.h (imported from GNU's libc) - nvramtool (more complicated header) The removed lines are: - fmt.Fprintln(f, "/* This file is part of the coreboot project. */") -# This file is part of a set of unofficial pre-commit hooks available -/* This file is part of coreboot */ -# This file is part of msrtool. -/* This file is part of msrtool. */ - * This file is part of ncurses, designed to be appended after curses.h.in -/* This file is part of pgtblgen. */ - * This file is part of the coreboot project. - /* This file is part of the coreboot project. */ -# This file is part of the coreboot project. -# This file is part of the coreboot project. -## This file is part of the coreboot project. --- This file is part of the coreboot project. -/* This file is part of the coreboot project */ -/* This file is part of the coreboot project. */ -;## This file is part of the coreboot project. -# This file is part of the coreboot project. It originated in the - * This file is part of the coreinfo project. -## This file is part of the coreinfo project. - * This file is part of the depthcharge project. -/* This file is part of the depthcharge project. */ -/* This file is part of the ectool project. */ - * This file is part of the GNU C Library. - * This file is part of the libpayload project. -## This file is part of the libpayload project. -/* This file is part of the Linux kernel. */ -## This file is part of the superiotool project. -/* This file is part of the superiotool project */ -/* This file is part of uio_usbdebug */ Change-Id: I82d872b3b337388c93d5f5bf704e9ee9e53ab3a9 Signed-off-by: Patrick Georgi <pgeorgi@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/41194 Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
255 lines
6.8 KiB
C
255 lines
6.8 KiB
C
/* SPDX-License-Identifier: GPL-2.0-or-later */
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/* RAM-based driver for SMSC LPC47N217 Super I/O chip. */
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#include <arch/io.h>
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#include <device/device.h>
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#include <device/pnp.h>
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#include <console/console.h>
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#include <assert.h>
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#include "lpc47n217.h"
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/* Forward declarations */
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static void enable_dev(struct device *dev);
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static void lpc47n217_pnp_set_resources(struct device *dev);
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static void lpc47n217_pnp_enable_resources(struct device *dev);
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static void lpc47n217_pnp_enable(struct device *dev);
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static void lpc47n217_init(struct device *dev);
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static void lpc47n217_pnp_set_resource(struct device *dev, struct resource *resource);
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static void lpc47n217_pnp_set_iobase(struct device *dev, u16 iobase);
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static void lpc47n217_pnp_set_drq(struct device *dev, u8 drq);
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static void lpc47n217_pnp_set_irq(struct device *dev, u8 irq);
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static void lpc47n217_pnp_set_enable(struct device *dev, int enable);
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static void pnp_enter_conf_state(struct device *dev);
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static void pnp_exit_conf_state(struct device *dev);
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struct chip_operations superio_smsc_lpc47n217_ops = {
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CHIP_NAME("SMSC LPC47N217 Super I/O")
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.enable_dev = enable_dev,
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};
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static struct device_operations ops = {
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.read_resources = pnp_read_resources,
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.set_resources = lpc47n217_pnp_set_resources,
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.enable_resources = lpc47n217_pnp_enable_resources,
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.enable = lpc47n217_pnp_enable,
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.init = lpc47n217_init,
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};
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static struct pnp_info pnp_dev_info[] = {
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{ NULL, LPC47N217_PP, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, 0x07f8, },
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{ NULL, LPC47N217_SP1, PNP_IO0 | PNP_IRQ0, 0x07f8, },
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{ NULL, LPC47N217_SP2, PNP_IO0 | PNP_IRQ0, 0x07f8, }
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};
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/**
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* Create device structures and allocate resources to devices specified in the
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* pnp_dev_info array (above).
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*
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* @param dev Pointer to structure describing a Super I/O device.
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*/
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static void enable_dev(struct device *dev)
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{
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pnp_enable_devices(dev, &ops, ARRAY_SIZE(pnp_dev_info), pnp_dev_info);
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}
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/**
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* Configure the specified Super I/O device with the resources (I/O space,
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* etc.) that have been allocate for it.
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*
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* NOTE: Cannot use pnp_set_resources() here because it assumes chip
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* support for logical devices, which the LPC47N217 doesn't have.
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*
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* @param dev Pointer to structure describing a Super I/O device.
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*/
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static void lpc47n217_pnp_set_resources(struct device *dev)
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{
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struct resource *res;
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pnp_enter_conf_state(dev);
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for (res = dev->resource_list; res; res = res->next)
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lpc47n217_pnp_set_resource(dev, res);
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/* dump_pnp_device(dev); */
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pnp_exit_conf_state(dev);
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}
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/*
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* NOTE: Cannot use pnp_enable_resources() here because it assumes chip
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* support for logical devices, which the LPC47N217 doesn't have.
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*/
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static void lpc47n217_pnp_enable_resources(struct device *dev)
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{
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pnp_enter_conf_state(dev);
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lpc47n217_pnp_set_enable(dev, 1);
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pnp_exit_conf_state(dev);
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}
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/*
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* NOTE: Cannot use pnp_set_enable() here because it assumes chip
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* support for logical devices, which the LPC47N217 doesn't have.
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*/
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static void lpc47n217_pnp_enable(struct device *dev)
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{
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pnp_enter_conf_state(dev);
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lpc47n217_pnp_set_enable(dev, !!dev->enabled);
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pnp_exit_conf_state(dev);
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}
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/**
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* Initialize the specified Super I/O device.
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*
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* Devices other than COM ports are ignored. For COM ports, we configure the
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* baud rate.
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*
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* @param dev Pointer to structure describing a Super I/O device.
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*/
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static void lpc47n217_init(struct device *dev)
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{
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if (!dev->enabled)
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return;
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}
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static void lpc47n217_pnp_set_resource(struct device *dev, struct resource *resource)
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{
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if (!(resource->flags & IORESOURCE_ASSIGNED)) {
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printk(BIOS_ERR, "ERROR: %s %02lx not allocated\n",
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dev_path(dev), resource->index);
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return;
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}
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/* Now store the resource. */
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/*
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* NOTE: Cannot use pnp_set_XXX() here because they assume chip
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* support for logical devices, which the LPC47N217 doesn't have.
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*/
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if (resource->flags & IORESOURCE_IO) {
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lpc47n217_pnp_set_iobase(dev, resource->base);
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} else if (resource->flags & IORESOURCE_DRQ) {
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lpc47n217_pnp_set_drq(dev, resource->base);
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} else if (resource->flags & IORESOURCE_IRQ) {
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lpc47n217_pnp_set_irq(dev, resource->base);
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} else {
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printk(BIOS_ERR, "ERROR: %s %02lx unknown resource type\n",
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dev_path(dev), resource->index);
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return;
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}
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resource->flags |= IORESOURCE_STORED;
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report_resource_stored(dev, resource, "");
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}
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static void lpc47n217_pnp_set_iobase(struct device *dev, u16 iobase)
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{
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ASSERT(!(iobase & 0x3));
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switch (dev->path.pnp.device) {
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case LPC47N217_PP:
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pnp_write_config(dev, 0x23, (iobase >> 2) & 0xff);
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break;
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case LPC47N217_SP1:
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pnp_write_config(dev, 0x24, (iobase >> 2) & 0xff);
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break;
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case LPC47N217_SP2:
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pnp_write_config(dev, 0x25, (iobase >> 2) & 0xff);
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break;
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default:
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BUG();
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break;
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}
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}
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static void lpc47n217_pnp_set_drq(struct device *dev, u8 drq)
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{
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const u8 PP_DMA_MASK = 0x0F;
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const u8 PP_DMA_SELECTION_REGISTER = 0x26;
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u8 current_config, new_config;
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if (dev->path.pnp.device == LPC47N217_PP) {
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current_config = pnp_read_config(dev,
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PP_DMA_SELECTION_REGISTER);
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ASSERT(!(drq & ~PP_DMA_MASK)); /* DRQ out of range? */
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new_config = (current_config & ~PP_DMA_MASK) | drq;
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pnp_write_config(dev, PP_DMA_SELECTION_REGISTER, new_config);
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} else {
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BUG();
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}
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}
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static void lpc47n217_pnp_set_irq(struct device *dev, u8 irq)
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{
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u8 irq_config_register = 0, irq_config_mask = 0;
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u8 current_config, new_config;
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switch (dev->path.pnp.device) {
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case LPC47N217_PP:
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irq_config_register = 0x27;
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irq_config_mask = 0x0F;
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break;
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case LPC47N217_SP1:
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irq_config_register = 0x28;
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irq_config_mask = 0xF0;
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irq <<= 4;
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break;
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case LPC47N217_SP2:
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irq_config_register = 0x28;
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irq_config_mask = 0x0F;
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break;
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default:
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BUG();
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return;
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}
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ASSERT(!(irq & ~irq_config_mask)); /* IRQ out of range? */
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current_config = pnp_read_config(dev, irq_config_register);
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new_config = (current_config & ~irq_config_mask) | irq;
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pnp_write_config(dev, irq_config_register, new_config);
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}
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static void lpc47n217_pnp_set_enable(struct device *dev, int enable)
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{
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u8 power_register = 0, power_mask = 0, current_power, new_power;
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switch (dev->path.pnp.device) {
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case LPC47N217_PP:
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power_register = 0x01;
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power_mask = 0x04;
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break;
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case LPC47N217_SP1:
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power_register = 0x02;
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power_mask = 0x08;
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break;
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case LPC47N217_SP2:
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power_register = 0x02;
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power_mask = 0x80;
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break;
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default:
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BUG();
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return;
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}
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current_power = pnp_read_config(dev, power_register);
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new_power = current_power & ~power_mask; /* Disable by default. */
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if (enable) {
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struct resource* ioport_resource;
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ioport_resource = find_resource(dev, PNP_IDX_IO0);
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lpc47n217_pnp_set_iobase(dev, ioport_resource->base);
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new_power |= power_mask; /* Enable. */
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} else {
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lpc47n217_pnp_set_iobase(dev, 0);
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}
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pnp_write_config(dev, power_register, new_power);
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}
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static void pnp_enter_conf_state(struct device *dev)
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{
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outb(0x55, dev->path.pnp.port);
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}
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static void pnp_exit_conf_state(struct device *dev)
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{
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outb(0xaa, dev->path.pnp.port);
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}
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