6e079dc120
Make intel_ht_sibling() available on all platforms. Will be used in MP init to only write "Core" MSRs from one thread on HyperThreading enabled platforms, to prevent race conditions and resulting #GP if MSRs are written twice or are already locked. Change-Id: I5d000b34ba4c6536dc866fbaf106b78e905e3e35 Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/35619 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org>
46 lines
1.2 KiB
C
46 lines
1.2 KiB
C
/*
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* This file is part of the coreboot project.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; version 2 of the License.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#include <cpu/x86/lapic.h>
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#include <cpu/intel/common/common.h>
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#include <arch/cpu.h>
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/*
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* Return true if running thread does not have the smallest lapic ID
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* within a CPU core.
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*/
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bool intel_ht_sibling(void)
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{
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struct cpuid_result result;
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unsigned int core_ids, apic_ids, threads;
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/* Is Hyper-Threading supported */
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if (!(cpuid_edx(1) & CPUID_FEAURE_HTT))
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return false;
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apic_ids = 1;
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if (cpuid_eax(0) >= 1)
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apic_ids = (cpuid_ebx(1) >> 16) & 0xff;
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if (apic_ids == 0)
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apic_ids = 1;
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core_ids = 1;
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if (cpuid_eax(0) >= 4) {
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result = cpuid_ext(4, 0);
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core_ids += (result.eax >> 26) & 0x3f;
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}
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threads = (apic_ids / core_ids);
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return !!(lapicid() & (threads - 1));
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}
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