system76-coreboot

Files

Edwin Beasant a9796ed362 - Clean up and comment writing of MSRs for cache control (Backport from v3)

- Invalidate Cache Tags (by means of in-place rewrite of cache data) which allows CAR data to be flushed to RAM
- Re-enable cache after flush of CAR to RAM


Signed-off-by: Edwin Beasant <edwin_beasant@virtensys.com>
Acked-by: Patrick Georgi <patrick.georgi@coresystems.de>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5055 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

2010-01-26 11:22:43 +00:00

amd

- Clean up and comment writing of MSRs for cache control (Backport from v3)

2010-01-26 11:22:43 +00:00

emulation

Make qemu use the udelay function in src/pc80/udelay_io.c

2010-01-11 09:05:52 +00:00

intel

Fix ACPI build on a couple of boards (now that it's active)

2010-01-25 15:17:11 +00:00

via

Fix ACPI build on a couple of boards (now that it's active)