Kyösti Mälkki 6f6a249a75 usbdebug: Remove EHCI_DEBUG_OFFSET ...

Read this variable from PCI configuration capabilities list instead.

Change-Id: I0cfe981833873397c32cd3aa2af307f35f01784b
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: http://review.coreboot.org/5176
Tested-by: build bot (Jenkins)
Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>

2014-02-16 20:10:54 +01:00

..

arch

coreboot: infrastructure for different ramstage loaders

2014-02-15 18:39:29 +01:00

console

console/uart8250*: Remove inclusion of mc146818rtc.h

2014-02-15 22:56:18 +01:00

cpu

coreboot: infrastructure for different ramstage loaders

2014-02-15 18:39:29 +01:00

device

PCI: Add capability list parser to romstage

2014-02-12 22:01:00 +01:00

drivers

usbdebug: Remove EHCI_DEBUG_OFFSET

2014-02-16 20:10:54 +01:00

ec

chromeec: allow override of i8042 interrupt

2014-01-30 05:36:33 +01:00

include

coreboot: infrastructure for different ramstage loaders

2014-02-15 18:39:29 +01:00

lib

coreboot: infrastructure for different ramstage loaders

2014-02-15 18:39:29 +01:00

mainboard

Jetway NF81-T56N-LF [2/2]: actually implement mainboard support.

2014-02-16 04:51:47 +01:00

northbridge

Eliminate some ASL warnings

2014-02-13 01:04:02 +01:00

soc

coreboot: infrastructure for different ramstage loaders

2014-02-15 18:39:29 +01:00

southbridge

usbdebug: Remove EHCI_DEBUG_OFFSET

2014-02-16 20:10:54 +01:00

superio

superio/fintek: Document Fintek F71869AD code.

2014-02-13 17:14:20 +01:00

vendorcode

coreboot: infrastructure for different ramstage loaders

2014-02-15 18:39:29 +01:00

Kconfig

Kconfig: Move vendorcode menu up from the bottom to above Chipset menu

2014-02-11 21:37:29 +01:00