6fea323ffe
There's no need to have these separated. BUG=b:64932381 Test=Build & Boot Change-Id: I22898d3bf95d5e9a8fc2643bfccae1e2f5b29e44 Signed-off-by: Martin Roth <martinroth@google.com> Reviewed-on: https://review.coreboot.org/22184 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org>
36 lines
1.0 KiB
C
36 lines
1.0 KiB
C
/*
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* This file is part of the coreboot project.
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*
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* Copyright (C) 2015-2016 Advanced Micro Devices, Inc.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; version 2 of the License.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#include <AGESA.h>
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#include <BiosCallOuts.h>
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#include <FchPlatform.h>
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#include <soc/southbridge.h>
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#include <stdlib.h>
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extern const GPIO_CONTROL oem_kahlee_gpio[];
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void platform_FchParams_reset(FCH_RESET_DATA_BLOCK *FchParams_reset)
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{
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FchParams_reset->EarlyOemGpioTable = (void *)oem_kahlee_gpio;
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}
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void platform_FchParams_env(FCH_DATA_BLOCK *FchParams_env)
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{
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FchParams_env->PostOemGpioTable = (void *)oem_kahlee_gpio;
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/* SDHCI/MMC configuration */
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FchParams_env->Sd.SdSlotType = 1; // EMMC
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}
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