718c6faff4
Move soft_reset() to `southbridge/amd/common/` it's only used for amdfam10 now. Drop hard_reset() for good. Change-Id: Ifdc5791160653c5578007f6c1b96015efe2b3e1e Signed-off-by: Nico Huber <nico.h@gmx.de> Reviewed-on: https://review.coreboot.org/29059 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org>
99 lines
2.0 KiB
C
99 lines
2.0 KiB
C
/*
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* This file is part of the coreboot project.
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*
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* Copyright 2015 yhlu
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; version 2 of the License.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#include "amd8111.h"
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#include <reset.h>
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#include <southbridge/amd/common/reset.h>
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unsigned get_sbdn(unsigned bus)
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{
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pci_devfn_t dev;
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/* Find the device.
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* There can only be one 8111 on a hypertransport chain/bus.
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*/
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dev = pci_locate_device_on_bus(
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PCI_ID(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_8111_PCI),
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bus);
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return (dev>>15) & 0x1f;
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}
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static void enable_cf9_x(unsigned sbbusn, unsigned sbdn)
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{
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pci_devfn_t dev;
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uint8_t byte;
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dev = PCI_DEV(sbbusn, sbdn+1, 3); //ACPI
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/* enable cf9 */
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byte = pci_read_config8(dev, 0x41);
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byte |= (1<<6) | (1<<5);
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pci_write_config8(dev, 0x41, byte);
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}
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static void enable_cf9(void)
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{
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unsigned sblk = get_sblk();
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unsigned sbbusn = get_sbbusn(sblk);
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unsigned sbdn = get_sbdn(sbbusn);
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enable_cf9_x(sbbusn, sbdn);
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}
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void do_board_reset(void)
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{
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set_bios_reset();
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/* reset */
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enable_cf9();
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outb(0x0e, 0x0cf9); // make sure cf9 is enabled
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}
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void enable_fid_change_on_sb(unsigned sbbusn, unsigned sbdn)
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{
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pci_devfn_t dev;
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dev = PCI_DEV(sbbusn, sbdn+1, 3); // ACPI
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pci_write_config8(dev, 0x74, 4);
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/* set VFSMAF (VID/FID System Management Action Field) to 2 */
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pci_write_config32(dev, 0x70, 2<<12);
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}
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static void soft_reset_x(unsigned sbbusn, unsigned sbdn)
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{
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pci_devfn_t dev;
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dev = PCI_DEV(sbbusn, sbdn+1, 0); //ISA
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/* Reset */
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set_bios_reset();
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pci_write_config8(dev, 0x47, 1);
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}
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void do_soft_reset(void)
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{
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unsigned sblk = get_sblk();
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unsigned sbbusn = get_sbbusn(sblk);
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unsigned sbdn = get_sbdn(sbbusn);
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return soft_reset_x(sbbusn, sbdn);
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}
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