Wolfgang Kamp 9ae1eb6961 Super I/O W83627DHG: Enable UART B by redirecting pins ...

Pins 78-85 are set to GPIO after power on or reset. To enable
UART B the pins must be redirected to it.

Look at W83627DHG databook version 1.4 page 185 Chip
(global) Control Register CR2C.

Change-Id: I12b094a60d9c5cb2447a553be4679a4605e19845
Signed-off-by: Wolfgang Kamp <wmkamp@datakamp.de>
Reviewed-on: http://review.coreboot.org/2626
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Tested-by: build bot (Jenkins)

2013-03-15 17:51:48 +01:00

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fintek

GPLv2 notice: Unify all files to just use one space in »MA 02110-1301«

2013-03-01 10:16:08 +01:00

intel

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ite

GPLv2 notice: Unify all files to just use one space in »MA 02110-1301«

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nsc

GPLv2 notice: Unify all files to just use one space in »MA 02110-1301«

2013-03-01 10:16:08 +01:00

nuvoton

GPLv2 notice: Unify all files to just use one space in »MA 02110-1301«

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renesas

GPLv2 notice: Unify all files to just use one space in »MA 02110-1301«

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serverengines

GPLv2 notice: Unify all files to just use one space in »MA 02110-1301«

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smsc

AMD SB800: don't switch clock from 14 to 48 MHz for smscsuperio

2013-03-06 19:07:28 +01:00

via

GPLv2 notice: Unify all files to just use one space in »MA 02110-1301«

2013-03-01 10:16:08 +01:00

winbond

Super I/O W83627DHG: Enable UART B by redirecting pins

2013-03-15 17:51:48 +01:00

Kconfig

AMD SB800: don't switch clock from 14 to 48 MHz for smscsuperio

2013-03-06 19:07:28 +01:00

Makefile.inc

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2013-03-01 10:16:08 +01:00