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system76-coreboot/src
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Huayang Duan 7265bab69e soc/mediatek/mt8192: Define DRAM registers and APIs 
Signed-off-by: Huayang Duan <huayang.duan@mediatek.com>
Change-Id: Ifc64fb6c60d57184c4a2f9febe765b5cb69b39ae
Reviewed-on: https://review.coreboot.org/c/coreboot/+/44699
Reviewed-by: Hung-Te Lin <hungte@chromium.org>
Reviewed-by: Yu-Ping Wu <yupingso@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2020-12-15 01:44:14 +00:00
..
acpi
cbfs: Simplify load/map API names, remove type arguments
2020-12-02 22:13:17 +00:00
arch
arch/x86: Combine bootblock linker scripts
2020-12-14 08:24:25 +00:00
commonlib
coreboot tables: Add SPI flash memory map windows to coreboot tables
2020-12-08 22:56:09 +00:00
console
lib/trace: Remove TRACE support
2020-12-02 23:35:58 +00:00
cpu
arch/x86: Combine bootblock linker scripts
2020-12-14 08:24:25 +00:00
device
drivers: Replace multiple fill_lb_framebuffer with single instance
2020-12-14 08:21:22 +00:00
drivers
drivers: Replace multiple fill_lb_framebuffer with single instance
2020-12-14 08:21:22 +00:00
ec
src: Remove redundant use of ACPI offset(0)
2020-12-03 00:05:52 +00:00
include
src/lib: Add Kconfig option for SPD cache in FMAP
2020-12-14 08:23:41 +00:00
lib
src/lib: Add Kconfig option for SPD cache in FMAP
2020-12-14 08:23:41 +00:00
mainboard
mb/intel/tglrvp: Enable CNVi Bluetooth for UP4
2020-12-14 20:15:01 +00:00
northbridge
nb/intel/ironlake: Add comment about MCH scan chains
2020-12-14 08:24:12 +00:00
security
cbfs: Add verification for RO CBFS metadata hash
2020-12-03 00:11:08 +00:00
soc
soc/mediatek/mt8192: Define DRAM registers and APIs
2020-12-15 01:44:14 +00:00
southbridge
sb/intel/common/smbus_ops.c: Clean up read resources
2020-12-14 21:03:28 +00:00
superio
src: Remove redundant use of ACPI offset(0)
2020-12-03 00:05:52 +00:00
vendorcode
vc/intel/fsp/fsp2_0/cooperlake_sp: Update WW47 FSP Memory map HOB
2020-12-07 10:30:09 +00:00
Kconfig
Kconfig: Show console debug options if loglevel override is set
2020-12-11 15:58:24 +00:00