a73b93157f
It encourages users from writing to the FSF without giving an address. Linux also prefers to drop that and their checkpatch.pl (that we imported) looks out for that. This is the result of util/scripts/no-fsf-addresses.sh with no further editing. Change-Id: Ie96faea295fe001911d77dbc51e9a6789558fbd6 Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Reviewed-on: http://review.coreboot.org/11888 Tested-by: build bot (Jenkins) Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com> Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
136 lines
3.3 KiB
C
136 lines
3.3 KiB
C
/*
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* This file is part of the coreboot project.
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*
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* Copyright (C) 2008-2009 coresystems GmbH
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; version 2 of the License.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#include <arch/io.h>
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#include <console/console.h>
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#include <cpu/x86/smm.h>
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#include <southbridge/intel/bd82x6x/nvs.h>
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#include <southbridge/intel/bd82x6x/pch.h>
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#include <southbridge/intel/bd82x6x/me.h>
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#include <northbridge/intel/sandybridge/sandybridge.h>
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#include <cpu/intel/model_206ax/model_206ax.h>
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#include <elog.h>
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#include <ec/compal/ene932/ec.h>
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#include "ec.h"
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static u8 mainboard_smi_ec(void)
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{
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u8 src;
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u32 pm1_cnt;
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#if CONFIG_ELOG_GSMI
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static int battery_critical_logged;
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#endif
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ec_kbc_write_cmd(0x56);
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src = ec_kbc_read_ob();
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printk(BIOS_DEBUG, "mainboard_smi_ec src: %x\n", src);
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switch (src) {
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case EC_BATTERY_CRITICAL:
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#if CONFIG_ELOG_GSMI
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if (!battery_critical_logged)
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elog_add_event_byte(ELOG_TYPE_EC_EVENT,
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EC_EVENT_BATTERY_CRITICAL);
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battery_critical_logged = 1;
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#endif
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break;
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case EC_LID_CLOSE:
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printk(BIOS_DEBUG, "LID CLOSED, SHUTDOWN\n");
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#if CONFIG_ELOG_GSMI
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elog_add_event_byte(ELOG_TYPE_EC_EVENT, EC_EVENT_LID_CLOSED);
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#endif
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/* Go to S5 */
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pm1_cnt = inl(smm_get_pmbase() + PM1_CNT);
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pm1_cnt |= (0xf << 10);
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outl(pm1_cnt, smm_get_pmbase() + PM1_CNT);
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break;
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}
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return src;
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}
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void mainboard_smi_gpi(u32 gpi_sts)
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{
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u32 pm1_cnt;
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printk(BIOS_DEBUG, "mainboard_smi_gpi: %x\n", gpi_sts);
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if (gpi_sts & (1 << EC_SMI_GPI)) {
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/* Process all pending events from EC */
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while (mainboard_smi_ec() != EC_NO_EVENT);
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}
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else if (gpi_sts & (1 << EC_LID_GPI)) {
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printk(BIOS_DEBUG, "LID CLOSED, SHUTDOWN\n");
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#if CONFIG_ELOG_GSMI
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elog_add_event_byte(ELOG_TYPE_EC_EVENT, EC_EVENT_LID_CLOSED);
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#endif
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/* Go to S5 */
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pm1_cnt = inl(smm_get_pmbase() + PM1_CNT);
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pm1_cnt |= (0xf << 10);
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outl(pm1_cnt, smm_get_pmbase() + PM1_CNT);
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}
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}
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void mainboard_smi_sleep(u8 slp_typ)
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{
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printk(BIOS_DEBUG, "mainboard_smi_sleep: %x\n", slp_typ);
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/* Disable SCI and SMI events */
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/* Clear pending events that may trigger immediate wake */
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/* Enable wake events */
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/* Tell the EC to Disable USB power */
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if (smm_get_gnvs()->s3u0 == 0 && smm_get_gnvs()->s3u1 == 0) {
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ec_kbc_write_cmd(0x45);
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ec_kbc_write_ib(0xF2);
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}
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}
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#define APMC_ACPI_EN 0xe1
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#define APMC_ACPI_DIS 0x1e
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int mainboard_smi_apmc(u8 apmc)
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{
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printk(BIOS_DEBUG, "mainboard_smi_apmc: %x\n", apmc);
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switch (apmc) {
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case APMC_ACPI_EN:
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printk(BIOS_DEBUG, "APMC: ACPI_EN\n");
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/* Clear all pending events */
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/* EC cmd:59 data:E8 */
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ec_kbc_write_cmd(0x59);
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ec_kbc_write_ib(0xE8);
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/* Set LID GPI to generate SCIs */
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gpi_route_interrupt(EC_LID_GPI, GPI_IS_SCI);
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break;
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case APMC_ACPI_DIS:
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printk(BIOS_DEBUG, "APMC: ACPI_DIS\n");
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/* Clear all pending events */
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/* EC cmd:59 data:e9 */
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ec_kbc_write_cmd(0x59);
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ec_kbc_write_ib(0xE9);
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/* Set LID GPI to generate SMIs */
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gpi_route_interrupt(EC_LID_GPI, GPI_IS_SMI);
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break;
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}
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return 0;
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}
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