sravan/system76-coreboot
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system76-coreboot/src
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Angel Pons 75594e9ff7 nb/intel/haswell: Put DMIBAR/EPBAR registers into separate files 
Tested with BUILD_TIMELESS=1, Asrock B85M Pro4 remains identical.

Change-Id: Ib68d8b88b0d79cb33d42f9e21cfb0e57abae75e8
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/45355
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2020-09-17 20:22:31 +00:00
..
acpi
acpi: Correct sizes for ACPI data fields
2020-09-15 13:41:58 +00:00
arch
memory_info: add max_speed_mts and configured_speed_mts
2020-09-03 21:27:54 +00:00
commonlib
util/cbfstool: extend includes in commonlib
2020-09-14 07:10:53 +00:00
console
ec/system76: Add console support
2020-09-07 21:46:34 +00:00
cpu
cpu/intel/model_1067x: enable PECI
2020-09-12 10:50:33 +00:00
device
src: Remove redundant <device/pnp_def.h>
2020-09-17 13:21:48 +00:00
drivers
drivers/intel/mipi_camera: Add compatible field for NVM
2020-09-16 07:16:09 +00:00
ec
ec/google/chromeec: Add dptc interface support
2020-09-17 06:18:59 +00:00
include
src: Remove redundant <device/pnp_type.h>
2020-09-17 13:22:44 +00:00
lib
region_file_update_data_arr: Modify region_file with array of buffers
2020-09-16 16:02:54 +00:00
mainboard
nb/intel/sandybridge: Drop casts from DEFAULT_{MCHBAR,DMIBAR}
2020-09-17 19:35:19 +00:00
northbridge
nb/intel/haswell: Put DMIBAR/EPBAR registers into separate files
2020-09-17 20:22:31 +00:00
security
security/intel/txt/getsec.c: Do not check lock bit
2020-08-30 19:26:48 +00:00
soc
mb/volteer: Select USE_CAR_NEM_ENHANCED_V2 for Tigerlake QS based
2020-09-17 19:04:28 +00:00
southbridge
sb/intel/lynxpoint/acpi: Do not determine PCH type at runtime
2020-09-14 07:07:12 +00:00
superio
src: Remove redundant <device/pnp_type.h>
2020-09-17 13:22:44 +00:00
vendorcode
chromeos: Provide common watchdog reboot support in romstage
2020-09-15 01:09:38 +00:00
Kconfig
Kconfig: Update ASan config options
2020-08-21 07:42:21 +00:00