76cedd2c29
This change moves all ACPI table support in coreboot currently living under arch/x86 into common code to make it architecture independent. ACPI table generation is not really tied to any architecture and hence it makes sense to move this to its own directory. In order to make it easier to review, this change is being split into multiple CLs. This is change 3/5 which basically is generated by running the following command: $ git grep -iIl "arch/acpi" | xargs sed -i 's/arch\/acpi/acpi\/acpi/g' BUG=b:155428745 Change-Id: I16b1c45d954d6440fb9db1d3710063a47b582eae Signed-off-by: Furquan Shaikh <furquan@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/40938 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr>
111 lines
2.9 KiB
C
111 lines
2.9 KiB
C
/* SPDX-License-Identifier: GPL-2.0-only */
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/* This file is part of the coreboot project. */
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#include <acpi/acpi.h>
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#include <acpi/acpi_device.h>
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#include <acpi/acpigen.h>
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#include <console/console.h>
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#include <device/i2c.h>
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#include <device/device.h>
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#include <device/path.h>
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#include <stdint.h>
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#include <vendorcode/google/chromeos/chromeos.h>
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#include "chip.h"
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#define RT1011_ACPI_HID "10EC1011"
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#define RT1011_DP_INT(key, val) acpi_dp_add_integer(dp, "realtek," key, (val))
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static void rt1011_fill_ssdt(const struct device *dev)
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{
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struct drivers_i2c_rt1011_config *config = dev->chip_info;
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const char *scope = acpi_device_scope(dev);
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struct acpi_i2c i2c = {
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.address = dev->path.i2c.device,
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.mode_10bit = dev->path.i2c.mode_10bit,
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.speed = I2C_SPEED_FAST,
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.resource = scope,
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};
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struct acpi_dp *dp;
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uint64_t r0_value, temp_value;
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if (!dev->enabled || !scope)
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return;
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/* Device */
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acpigen_write_scope(scope);
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acpigen_write_device(acpi_device_name(dev));
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acpigen_write_name_string("_HID", RT1011_ACPI_HID);
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acpigen_write_name_integer("_UID", config->uid);
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acpigen_write_name_string("_DDN", config->desc);
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acpigen_write_STA(acpi_device_status(dev));
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/* Resources */
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acpigen_write_name("_CRS");
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acpigen_write_resourcetemplate_header();
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acpi_device_write_i2c(&i2c);
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acpigen_write_resourcetemplate_footer();
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/* Device Properties */
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if (CONFIG(CHROMEOS_DSM_CALIB)) {
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if (get_dsm_calibration_from_key(config->r0_calib_key, &r0_value)
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|| get_dsm_calibration_from_key(config->temperature_calib_key,
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&temp_value)) {
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printk(BIOS_ERR,
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"Failed to get dsm_calib parameters from VPD"
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" with key %s and %s\n",
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config->r0_calib_key, config->temperature_calib_key);
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} else {
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dp = acpi_dp_new_table("_DSD");
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RT1011_DP_INT("r0_calib", r0_value);
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RT1011_DP_INT("temperature_calib", temp_value);
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acpi_dp_write(dp);
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printk(BIOS_INFO, "set dsm_calib properties\n");
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}
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}
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acpigen_pop_len(); /* Device */
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acpigen_pop_len(); /* Scope */
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printk(BIOS_INFO, "%s: %s address 0%xh\n", acpi_device_path(dev), dev->chip_ops->name,
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dev->path.i2c.device);
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}
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static const char *rt1011_acpi_name(const struct device *dev)
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{
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struct drivers_i2c_rt1011_config *config = dev->chip_info;
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static char name[5];
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if (config->name)
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return config->name;
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snprintf(name, sizeof(name), "D%03.3X", dev->path.i2c.device);
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return name;
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}
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static struct device_operations rt1011_ops = {
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.read_resources = noop_read_resources,
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.set_resources = noop_set_resources,
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.acpi_name = rt1011_acpi_name,
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.acpi_fill_ssdt = rt1011_fill_ssdt,
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};
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static void rt1011_enable(struct device *dev)
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{
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struct drivers_i2c_rt1011_config *config = dev->chip_info;
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if (!config)
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return;
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dev->ops = &rt1011_ops;
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/* Name the device as per description provided in devicetree */
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if (config->desc)
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dev->name = config->desc;
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}
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struct chip_operations drivers_i2c_rt1011_ops = {
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CHIP_NAME("Realtek RT1011 Codec")
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.enable_dev = rt1011_enable
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};
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