776b85ba45
romstage.c like r5255 did for failover/fallback/normal mainboards. Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de> Acked-by: Myles Watson <mylesgw@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5257 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
15 lines
281 B
C
15 lines
281 B
C
#define __PRE_RAM__
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#include <stdint.h>
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#include <device/pci_def.h>
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#include <device/pci_ids.h>
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#include <arch/io.h>
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#include "arch/romcc_io.h"
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/* no code inclusion allowed */
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//#include "pc80/mc146818rtc_early.c"
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//#include "cpu/x86/lapic/boot_cpu.c"
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static void main(void)
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{
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}
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