91ffac8c04
List of changes: 1. Add required SoC programming till ramstage 2. Include only required headers into include/soc 3. Fill required FSP-S UPD to call FSP-S API BUG=b:224325352 TEST= Build 'util/abuild/abuild -p none -t google/rex -a -c max'. Signed-off-by: Ravi Sarawadi <ravishankar.sarawadi@intel.com> Change-Id: Ie746c0bfcf1f315a4ab6f540cc7c4933157551d7 Reviewed-on: https://review.coreboot.org/c/coreboot/+/63364 Reviewed-by: Subrata Banik <subratabanik@google.com> Reviewed-by: Tarun Tuli <taruntuli@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
45 lines
1.1 KiB
C
45 lines
1.1 KiB
C
/* SPDX-License-Identifier: GPL-2.0-only */
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#include <console/console.h>
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#include <device/device.h>
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#include <intelblocks/p2sb.h>
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#include <soc/iomap.h>
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void p2sb_soc_get_sb_mask(uint32_t *ep_mask, size_t count)
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{
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uint32_t mask;
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if (count != P2SB_EP_MASK_MAX_REG) {
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printk(BIOS_ERR, "Unable to program EPMASK registers\n");
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return;
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}
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/* Remove the host accessing right to PSF register range.
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* Set p2sb PCI offset EPMASK5 [29, 28, 27, 26] to disable Sideband
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* access for PCI Root Bridge.
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*/
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mask = (1 << 29) | (1 << 28) | (1 << 27) | (1 << 26);
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ep_mask[P2SB_EP_MASK_5_REG] = mask;
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/*
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* Set p2sb PCI offset EPMASK7 [31, 30] to disable Sideband
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* access for Broadcast and Multicast.
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*/
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mask = (1 << 31) | (1 << 30);
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ep_mask[P2SB_EP_MASK_7_REG] = mask;
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}
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static void ioe_p2sb_read_resources(struct device *dev)
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{
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/* Add the fixed MMIO resource for IOM */
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mmio_resource_kb(dev, 0, IOM_BASE_ADDR / KiB, IOM_BASE_SIZE / KiB);
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}
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struct device_operations ioe_p2sb_ops = {
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.read_resources = ioe_p2sb_read_resources,
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.set_resources = noop_set_resources,
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.scan_bus = scan_static_bus,
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};
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