Change-Id: I05f9ea97ea80ac7a8f34845c59bd66e424ba2991 Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/28709 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
80 lines
2.1 KiB
C
80 lines
2.1 KiB
C
/*
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* This file is part of the coreboot project.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; version 2 of the License.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#include <console/console.h>
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#include <device/device.h>
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#include <device/pci.h>
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#include <device/pci_ids.h>
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#include <device/pci_ops.h>
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#include "amd8111.h"
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static void ide_init(struct device *dev)
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{
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struct southbridge_amd_amd8111_config *conf;
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/* Enable ide devices so the linux ide driver will work */
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uint16_t word;
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uint8_t byte;
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conf = dev->chip_info;
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word = pci_read_config16(dev, 0x40);
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/* Ensure prefetch is disabled */
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word &= ~((1 << 15) | (1 << 13));
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if (conf->ide1_enable) {
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/* Enable secondary ide interface */
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word |= (1<<0);
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printk(BIOS_DEBUG, "IDE1 ");
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}
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if (conf->ide0_enable) {
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/* Enable primary ide interface */
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word |= (1<<1);
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printk(BIOS_DEBUG, "IDE0 ");
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}
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word |= (1<<12);
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word |= (1<<14);
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pci_write_config16(dev, 0x40, word);
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byte = 0x20; // Latency: 64-->32
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pci_write_config8(dev, 0xd, byte);
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word = 0x0f;
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pci_write_config16(dev, 0x42, word);
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}
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static void lpci_set_subsystem(struct device *dev, unsigned int vendor,
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unsigned int device)
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{
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pci_write_config32(dev, 0x70,
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((device & 0xffff) << 16) | (vendor & 0xffff));
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}
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static struct pci_operations lops_pci = {
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.set_subsystem = lpci_set_subsystem,
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};
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static struct device_operations ide_ops = {
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.read_resources = pci_dev_read_resources,
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.set_resources = pci_dev_set_resources,
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.enable_resources = pci_dev_enable_resources,
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.init = ide_init,
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.scan_bus = 0,
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.enable = amd8111_enable,
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.ops_pci = &lops_pci
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};
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static const struct pci_driver ide_driver __pci_driver = {
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.ops = &ide_ops,
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.vendor = PCI_VENDOR_ID_AMD,
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.device = PCI_DEVICE_ID_AMD_8111_IDE,
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};
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