Files
system76-coreboot/src/southbridge/amd/amd8111/smbus.c
Elyes HAOUAS 78d338ccb9 sb/amd: Use 'unsigned int' to bare use of 'unsigned'
Change-Id: I05f9ea97ea80ac7a8f34845c59bd66e424ba2991
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/28709
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2018-10-24 10:01:55 +00:00

55 lines
1.6 KiB
C

/*
* This file is part of the coreboot project.
*
* (C) 2004 Linux Networx
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; version 2 of the License.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
#include <console/console.h>
#include <device/device.h>
#include <device/pci.h>
#include <device/pci_ids.h>
#include <device/pci_ops.h>
#include <device/smbus.h>
#include <arch/io.h>
#include "amd8111.h"
static void lpci_set_subsystem(struct device *dev, unsigned int vendor,
unsigned int device)
{
pci_write_config32(dev, 0x44,
((device & 0xffff) << 16) | (vendor & 0xffff));
}
static struct smbus_bus_operations lops_smbus_bus = {
/* I haven't seen the 2.0 SMBUS controller used yet. */
};
static struct pci_operations lops_pci = {
.set_subsystem = lpci_set_subsystem,
};
static struct device_operations smbus_ops = {
.read_resources = pci_dev_read_resources,
.set_resources = pci_dev_set_resources,
.enable_resources = pci_dev_enable_resources,
.init = 0,
.scan_bus = scan_smbus,
.enable = amd8111_enable,
.ops_pci = &lops_pci,
.ops_smbus_bus = &lops_smbus_bus,
};
static const struct pci_driver smbus_driver __pci_driver = {
.ops = &smbus_ops,
.vendor = PCI_VENDOR_ID_AMD,
.device = PCI_DEVICE_ID_AMD_8111_SMB,
};