The new broadcast code doesn't support serial init - if a CPU needs serial init, this should be handled in the model specific CPU init code. Change-Id: I7cafb0af10d712366819ad0849f9b93558e9d46a Signed-off-by: Sven Schnelle <svens@stackframe.org> Reviewed-on: http://review.coreboot.org/1140 Tested-by: build bot (Jenkins)
69 lines
1.0 KiB
Plaintext
69 lines
1.0 KiB
Plaintext
if BOARD_IBM_E326
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config BOARD_SPECIFIC_OPTIONS # dummy
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def_bool y
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select ARCH_X86
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select CPU_AMD_SOCKET_940
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select NORTHBRIDGE_AMD_AMDK8
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select NORTHBRIDGE_AMD_AMDK8_ROOT_COMPLEX
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select SOUTHBRIDGE_AMD_AMD8111
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select SOUTHBRIDGE_AMD_AMD8131
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select SUPERIO_NSC_PC87366
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select HAVE_OPTION_TABLE
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select HAVE_PIRQ_TABLE
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select HAVE_MP_TABLE
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select SB_HT_CHAIN_UNITID_OFFSET_ONLY
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select WAIT_BEFORE_CPUS_INIT
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select BOARD_ROMSIZE_KB_512
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select QRANK_DIMM_SUPPORT
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config MAINBOARD_DIR
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string
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default ibm/e326
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config DCACHE_RAM_BASE
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hex
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default 0xcf000
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config DCACHE_RAM_SIZE
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hex
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default 0x1000
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config DCACHE_RAM_GLOBAL_VAR_SIZE
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hex
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default 0x0
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config APIC_ID_OFFSET
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hex
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default 0x0
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config MAINBOARD_PART_NUMBER
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string
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default "eServer 326"
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config MAX_CPUS
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int
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default 2
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config MAX_PHYSICAL_CPUS
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int
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default 2
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config SB_HT_CHAIN_ON_BUS0
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int
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default 0
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config HT_CHAIN_END_UNITID_BASE
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hex
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default 0x20
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config HT_CHAIN_UNITID_BASE
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hex
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default 0x1
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config IRQ_SLOT_COUNT
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int
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default 12
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endif # BOARD_IBM_E326
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