Kconfig directives to select chip drivers for compile literally match the chip directory names capitalized and underscored. Rename directories and Kconfig as follows: model_lx -> geode_lx model_gx1 -> geode_gx1 model_gx2 -> geode_gx2 Change-Id: Ib8bf1e758b88f9efed1cf8b11c76b796388e7147 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: http://review.coreboot.org/613 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
75 lines
2.2 KiB
Plaintext
75 lines
2.2 KiB
Plaintext
chip northbridge/amd/lx
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device pci_domain 0 on
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device pci 1.0 on end # Northbridge
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device pci 1.1 on end # Graphics
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device pci 1.2 on end # AES
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chip southbridge/amd/cs5536
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# IRQ 12 and 1 unmasked, Keyboard and Mouse IRQs. OK
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# SIRQ Mode = Active(Quiet) mode. Save power....
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# Invert mask = IRQ 12 and 1 are active high. Keyboard and Mouse, UARTs, etc IRQs. OK
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register "lpc_serirq_enable" = "0x0000105a"
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register "lpc_serirq_polarity" = "0x0000EFA5"
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register "lpc_serirq_mode" = "1"
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register "enable_gpio_int_route" = "0x0D0C0700"
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register "enable_ide_nand_flash" = "0" # 0:ide mode, 1:flash
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register "enable_USBP4_device" = "1" # 0: host, 1:device
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register "enable_USBP4_overcurrent" = "0" #0:off, xxxx:overcurrent setting CS5536 Data Book (pages 380-381)
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register "com1_enable" = "0"
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register "com1_address" = "0x3E8"
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register "com1_irq" = "4"
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register "com2_enable" = "0"
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register "com2_address" = "0x2E8"
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register "com2_irq" = "3"
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register "unwanted_vpci[0]" = "0" # End of list has a zero
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device pci c.0 on end # ISA Bridge (PC104)
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device pci e.0 on end # Ethernet
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device pci f.0 on # ISA Bridge
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chip superio/smsc/smscsuperio
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device pnp 4e.0 off # Floppy
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io 0x60 = 0x3f0
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irq 0x70 = 6
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drq 0x74 = 2
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end
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device pnp 4e.3 on # Parallel port
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io 0x60 = 0x378
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irq 0x70 = 7
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end
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device pnp 4e.4 on # Com1
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io 0x60 = 0x3f8
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irq 0x70 = 4
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end
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device pnp 4e.5 on # Com2
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io 0x60 = 0x2f8
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irq 0x70 = 3
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end
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device pnp 4e.7 on # Keyboard
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irq 0x70 = 1
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irq 0x72 = 12
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end
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device pnp 4e.a off end # Runtime/ACPI
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# superio/smsc/smscsuperio currently only supports the first 2 serial ports.
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device pnp 4e.b off # Com3
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io 0x60 = 0x3e8
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irq 0x70 = 10
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end
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device pnp 4e.c off # Com4
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io 0x60 = 0x2e8
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irq 0x70 = 11
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end
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end
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end
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device pci f.2 on end # IDE Controller
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device pci f.4 on end # OHCI
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device pci f.5 on end # EHCI
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end
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end
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# APIC cluster is late CPU init.
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device lapic_cluster 0 on
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chip cpu/amd/geode_lx
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device lapic 0 on end
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end
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end
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end
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