83b991afff
- Support for compiling romcc on non x86 platforms - new romc options -msse and -mmmx for specifying extra registers to use - Bug fixes to device the device disable/enable framework and an amd8111 implementation - Move the link specification to the chip specification instead of the path - Allow specifying devices with internal bridges. - Initial via epia support - Opteron errata fixes git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1200 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
33 lines
1.1 KiB
Plaintext
33 lines
1.1 KiB
Plaintext
val[00]: 0000c144 0000f8f8 00000000
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val[03]: 0000c14c 0000f8f8 00000001
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val[06]: 0000c154 0000f8f8 00000002
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val[09]: 0000c15c 0000f8f8 00000003
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val[0c]: 0000c164 0000f8f8 00000004
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val[0f]: 0000c16c 0000f8f8 00000005
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val[12]: 0000c174 0000f8f8 00000006
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val[15]: 0000c17c 0000f8f8 00000007
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val[00]: 0000c144 0000f8f8 00000000
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val[03]: 0000c14c 0000f8f8 00000001
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val[06]: 0000c154 0000f8f8 00000002
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val[09]: 0000c15c 0000f8f8 00000003
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val[0c]: 0000c164 0000f8f8 00000004
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val[0f]: 0000c16c 0000f8f8 00000005
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val[12]: 0000c174 0000f8f8 00000006
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val[15]: 0000c17c 0000f8f8 00000007
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val[00]: 0000c144 0000f8f8 00000000
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val[03]: 0000c14c 0000f8f8 00000001
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val[06]: 0000c154 0000f8f8 00000002
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val[09]: 0000c15c 0000f8f8 00000003
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val[0c]: 0000c164 0000f8f8 00000004
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val[0f]: 0000c16c 0000f8f8 00000005
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val[12]: 0000c174 0000f8f8 00000006
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val[15]: 0000c17c 0000f8f8 00000007
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val[00]: 0000c144 0000f8f8 00000000
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val[03]: 0000c14c 0000f8f8 00000001
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val[06]: 0000c154 0000f8f8 00000002
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val[09]: 0000c15c 0000f8f8 00000003
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val[0c]: 0000c164 0000f8f8 00000004
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val[0f]: 0000c16c 0000f8f8 00000005
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val[12]: 0000c174 0000f8f8 00000006
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val[15]: 0000c17c 0000f8f8 00000007
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