796fe068d3
No need to mark Makefiles, C files or devicetrees executable. Change-Id: Ide3a0efc5b14f2cbd7e2a65c541b52491575bb78 Signed-off-by: Patrick Georgi <pgeorgi@google.com> Reviewed-on: http://review.coreboot.org/7618 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
63 lines
2.5 KiB
C
63 lines
2.5 KiB
C
/*
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* This file is part of the coreboot project.
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*
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* Copyright (C) 2014 Felix Held <felix-coreboot@felixheld.de>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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*/
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/* Both NCT6776D and NCT6776F package variants are supported. */
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#ifndef SUPERIO_NUVOTON_NCT6776_H
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#define SUPERIO_NUVOTON_NCT6776_H
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/* Logical Device Numbers (LDN). */
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#define NCT6776_FDC 0x00 /* Floppy */
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#define NCT6776_PP 0x01 /* Parallel port */
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#define NCT6776_SP1 0x02 /* Com1 */
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#define NCT6776_SP2 0x03 /* Com2 & IR */
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#define NCT6776_KBC 0x05 /* PS/2 keyboard and mouse */
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#define NCT6776_CIR 0x06
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#define NCT6776_GPIO6789_V 0x07
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#define NCT6776_WDT1_GPIO01A_V 0x08
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#define NCT6776_GPIO1234567_V 0x09
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#define NCT6776_ACPI 0x0A
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#define NCT6776_HWM_FPLED 0x0B /* Hardware monitor & front LED */
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#define NCT6776_VID 0x0D
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#define NCT6776_CIRWKUP 0x0E /* CIR wakeup */
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#define NCT6776_GPIO_PP_OD 0x0F /* GPIO Push-Pull/Open drain select */
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#define NCT6776_SVID 0x14
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#define NCT6776_DSLP 0x16 /* Deep sleep */
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#define NCT6776_GPIOA_LDN 0x17
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/* virtual LDN for GPIO and WDT */
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#define NCT6776_WDT1 ((0 << 8) | NCT6776_WDT1_GPIO01A_V)
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#define NCT6776_GPIOBASE ((0 << 8) | NCT6776_WDT1_GPIO01A_V) //?
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#define NCT6776_GPIO0 ((1 << 8) | NCT6776_WDT1_GPIO01A_V)
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#define NCT6776_GPIO1 ((1 << 8) | NCT6776_GPIO1234567_V)
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#define NCT6776_GPIO2 ((2 << 8) | NCT6776_GPIO1234567_V)
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#define NCT6776_GPIO3 ((3 << 8) | NCT6776_GPIO1234567_V)
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#define NCT6776_GPIO4 ((4 << 8) | NCT6776_GPIO1234567_V)
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#define NCT6776_GPIO5 ((5 << 8) | NCT6776_GPIO1234567_V)
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#define NCT6776_GPIO6 ((6 << 8) | NCT6776_GPIO1234567_V)
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#define NCT6776_GPIO7 ((7 << 8) | NCT6776_GPIO1234567_V)
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#define NCT6776_GPIO8 ((0 << 8) | NCT6776_GPIO6789_V)
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#define NCT6776_GPIO9 ((1 << 8) | NCT6776_GPIO6789_V)
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#define NCT6776_GPIOA ((2 << 8) | NCT6776_WDT1_GPIO01A_V)
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#endif /* SUPERIO_NUVOTON_NCT6776_H */
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