This change adds the wrapper code for the AMD Family12 cpus and the AMD Hudson-2 (SB900) southbridge to the cpu, northbridge and southbridge folders respectively. Change-Id: I22b6efe0017d0af03eaa36a1db1615e5f38da06c Signed-off-by: Frank Vibrans <frank.vibrans@amd.com> Signed-off-by: efdesign98 <efdesign98@gmail.com> Reviewed-on: http://review.coreboot.org/53 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
168 lines
4.6 KiB
C
Executable File
168 lines
4.6 KiB
C
Executable File
/*
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* This file is part of the coreboot project.
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*
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* Copyright (C) 2011 Advanced Micro Devices, Inc.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; version 2 of the License.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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*/
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//#include <config.h>
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#include <stdint.h>
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#include <device/pci_ids.h>
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#include <arch/io.h> /* inl, outl */
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#include <arch/romcc_io.h> /* device_t */
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#include "SbPlatform.h"
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#include "SbEarly.h"
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#include "cfg.h" /*sb900_cimx_config*/
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#include <console/console.h>
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#include <console/loglevel.h>
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#include "smbus.h"
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/**
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* @brief Get SouthBridge device number
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* @param[in] bus target bus number
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* @return southbridge device number
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*/
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u32 get_sbdn(u32 bus)
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{
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device_t dev;
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printk(BIOS_INFO, "SB900 - Early.c - get_sbdn - Start.\n");
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//dev = PCI_DEV(bus, 0x14, 0);
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dev = pci_locate_device_on_bus(
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PCI_ID(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_ATI_SB900_SM),
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bus);
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printk(BIOS_INFO, "SB900 - Early.c - get_sbdn - End.\n");
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return (dev >> 15) & 0x1f;
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}
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/**
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* @brief South Bridge CIMx romstage entry,
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* wrapper of sbPowerOnInit entry point.
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*/
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void sb_poweron_init(void)
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{
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AMDSBCFG sb_early_cfg;
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u8 data;
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printk(BIOS_INFO, "SB900 - Early.c - sb_poweron_init - Start.\n");
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//Enable/Disable PCI Bridge Device 14 Function 4.
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outb(0xEA, 0xCD6);
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data = inb(0xCD7);
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data &= !BIT0;
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if(!CONFIG_PCIB_ENABLE) {
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data |= BIT0;
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}
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outb(data, 0xCD7);
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SbPowerOnInit_Config(&sb_early_cfg);
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//sb_early_cfg.StdHeader.Func = SB_POWERON_INIT;
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//AmdSbDispatcher(&sb_early_cfg);
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//TODO
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//AMD_IMAGE_HEADER was missing, when using AmdSbDispatcher,
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// VerifyImage() will fail, LocateImage() take minitues to find the image.
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sbPowerOnInit(&sb_early_cfg);
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printk(BIOS_INFO, "SB900 - Early.c - sb_poweron_init - End.\n");
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}
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/**
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* @brief South Bridge CIMx romstage entry,
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* wrapper of sbPowerOnInit entry point.
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*/
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void sb_before_pci_init(void)
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{
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AMDSBCFG sb_early_cfg;
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printk(BIOS_INFO, "SB900 - Early.c - sb_before_pci_init - Start.\n");
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sb900_cimx_config(&sb_early_cfg);
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//sb_early_cfg.StdHeader.Func = SB_POWERON_INIT;
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//AmdSbDispatcher(&sb_early_cfg);
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//TODO
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//AMD_IMAGE_HEADER was missing, when using AmdSbDispatcher,
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// VerifyImage() will fail, LocateImage() take minitues to find the image.
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sbBeforePciInit(&sb_early_cfg);
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printk(BIOS_INFO, "SB900 - Early.c - sb_before_pci_init - End.\n");
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}
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void sb_After_Pci_Init(void)
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{
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AMDSBCFG sb_early_cfg;
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printk(BIOS_INFO, "SB900 - Early.c - sb_After_Pci_Init - Start.\n");
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sb900_cimx_config(&sb_early_cfg);
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//sb_early_cfg.StdHeader.Func = SB_POWERON_INIT;
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//AmdSbDispatcher(&sb_early_cfg);
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//TODO
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//AMD_IMAGE_HEADER was missing, when using AmdSbDispatcher,
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// VerifyImage() will fail, LocateImage() take minitues to find the image.
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sbAfterPciInit(&sb_early_cfg);
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printk(BIOS_INFO, "SB900 - Early.c - sb_After_Pci_Init - End.\n");
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}
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void sb_Mid_Post_Init(void)
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{
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AMDSBCFG sb_early_cfg;
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printk(BIOS_INFO, "SB900 - Early.c - sb_Mid_Post_Init - Start.\n");
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sb900_cimx_config(&sb_early_cfg);
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//sb_early_cfg.StdHeader.Func = SB_POWERON_INIT;
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//AmdSbDispatcher(&sb_early_cfg);
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//TODO
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//AMD_IMAGE_HEADER was missing, when using AmdSbDispatcher,
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// VerifyImage() will fail, LocateImage() take minitues to find the image.
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sbMidPostInit(&sb_early_cfg);
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printk(BIOS_INFO, "SB900 - Early.c - sb_Mid_Post_Init - End.\n");
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}
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void sb_Late_Post(void)
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{
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AMDSBCFG sb_early_cfg;
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u8 data;
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printk(BIOS_INFO, "SB900 - Early.c - sb_Late_Post - Start.\n");
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sb900_cimx_config(&sb_early_cfg);
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//sb_early_cfg.StdHeader.Func = SB_POWERON_INIT;
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//AmdSbDispatcher(&sb_early_cfg);
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//TODO
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//AMD_IMAGE_HEADER was missing, when using AmdSbDispatcher,
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// VerifyImage() will fail, LocateImage() take minitues to find the image.
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sbLatePost(&sb_early_cfg);
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//Set ACPI SCI IRQ to 0x9.
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data = CONFIG_ACPI_SCI_IRQ;
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outb(0x10, 0xC00);
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outb(data, 0xC01);
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outb(0x90, 0xC00);
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outb(data, 0xC01);
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if (data > 0x7) {
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data = inb(0x4D1);
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data |= (1 << (CONFIG_ACPI_SCI_IRQ - 8));
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outb(data, 0x4D1);
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} else {
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data = inb(0x4D0);
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data |= (1 << (CONFIG_ACPI_SCI_IRQ));
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outb(data, 0x4D0);
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}
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printk(BIOS_INFO, "SB900 - Early.c - sb_Late_Post - End.\n");
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}
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