Files
system76-coreboot/src
Deepti Deshatty 8386e7cd5b soc/intel/alderlake: Add known CPU Port IDs for GPIO communities
Change-Id: Id5fa5b10edeb3445a2d2453d9122376041577598
Signed-off-by: Deepti Deshatty <deepti.deshatty@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/54087
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
2021-05-14 08:57:57 +00:00
..
2021-05-14 00:35:46 +00:00
2021-05-14 00:35:46 +00:00