83b991afff
- Support for compiling romcc on non x86 platforms - new romc options -msse and -mmmx for specifying extra registers to use - Bug fixes to device the device disable/enable framework and an amd8111 implementation - Move the link specification to the chip specification instead of the path - Allow specifying devices with internal bridges. - Initial via epia support - Opteron errata fixes git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1200 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
21 lines
380 B
C
21 lines
380 B
C
#ifndef PNP_INDEX_REG
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#define PNP_INDEX_REG 0x15C
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#endif
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#ifndef PNP_DATA_REG
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#define PNP_DATA_REG 0x15D
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#endif
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#ifndef SIO_COM1
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#define SIO_COM1_BASE 0x3F8
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#endif
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#ifndef SIO_COM2
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#define SIO_COM2_BASE 0x2F8
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#endif
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extern struct chip_control superio_NSC_pc87360_control;
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struct superio_NSC_pc87360_config {
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struct com_ports com1;
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struct lpt_ports lpt;
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int port;
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};
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