Mathew King 855e1bc9c7 soc/amd/cezanne: Fill out pci devices in chipset.cb ...

BUG=b:180528708
TEST=builds

Signed-off-by: Mathew King <mathewk@chromium.org>
Change-Id: Iecc75afd7a914651ca15b811163d3559bf73ac9b
Reviewed-on: https://review.coreboot.org/c/coreboot/+/51045
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>

2021-03-02 16:59:48 +00:00

..

acpi

acpi: Move PCI functions to separate file

2021-03-01 08:26:23 +00:00

arch

mb/ocp/deltalake: Fill ECC type in romstage

2021-03-01 08:22:28 +00:00

commonlib

commonlib/bsd: Fix direct inclusion of <endian.h>

2021-02-18 02:33:04 +00:00

console

console/vtxprintf.c: Add missing <types.h>

2021-02-16 08:15:26 +00:00

cpu

src/cpu: Remove unused symbols

2021-02-18 10:11:24 +00:00

device

device/device.c: Rename .disable to .vga_disable

2021-02-24 11:28:16 +00:00

drivers

skylake,fsp1_1: Delete dead report_memory_config() function

2021-03-01 19:42:07 +00:00

ec

ec/system76/ec: Add OLED screen toggle

2021-02-27 09:38:19 +00:00

include

acpi: Move PCI functions to separate file

2021-03-01 08:26:23 +00:00

lib

memlayout: Store region sizes as separate symbols

2021-02-19 08:39:26 +00:00

mainboard

mb/google/brya: Fix a few mistakes in brya0 overridetree

2021-03-02 16:59:44 +00:00

northbridge

nb/intel/sandybridge: Clean up dram_timing function

2021-03-01 08:31:44 +00:00

security

vboot: update GBB flags to use altfw terminology

2021-02-27 09:37:49 +00:00

soc

soc/amd/cezanne: Fill out pci devices in chipset.cb

2021-03-02 16:59:48 +00:00

southbridge

sb/intel/bd82x6x: Turn ME PCI register structs into unions

2021-03-01 08:30:51 +00:00

superio

superio/smsc/sch5545: Add missing <types.h>

2021-02-13 22:06:28 +00:00

vendorcode

vendorcode/intel/fsp: Add Alder Lake FSP headers for FSP v2037

2021-02-25 15:50:36 +00:00

Kconfig

southbridge: Ensure common Kconfig gets included last

2021-02-18 10:11:39 +00:00