85c681e279
Change-Id: Ib82689150689716bc9afdf8d4527a1dcd5deae56 Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/c/coreboot/+/44612 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
146 lines
3.4 KiB
C
146 lines
3.4 KiB
C
/* SPDX-License-Identifier: GPL-2.0-only */
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#include <amdblocks/agesawrapper.h>
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static const PCIe_PORT_DESCRIPTOR PortList[] = {
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/*
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* Init Port descriptor (PCIe port, Lanes 8-15,
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* PCI Device Number 3, ...)
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*/
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{
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0,
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PCIE_ENGINE_DATA_INITIALIZER(PciePortEngine, 8, 15),
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PCIE_PORT_DATA_INITIALIZER_V2(PortEnabled, ChannelTypeExt6db,
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3, 1,
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HotplugDisabled,
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PcieGenMaxSupported,
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PcieGenMaxSupported,
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AspmDisabled, 0x02, 0)
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},
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/*
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* Initialize Port descriptor (PCIe port, Lane 7,
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* PCI Device Number 2, ...)
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*/
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{
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0,
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PCIE_ENGINE_DATA_INITIALIZER(PciePortEngine, 7, 7),
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PCIE_PORT_DATA_INITIALIZER_V2(PortEnabled, ChannelTypeExt6db,
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2, 5,
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HotplugDisabled,
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PcieGenMaxSupported,
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PcieGenMaxSupported,
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AspmDisabled, 0x03, 0)
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},
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/*
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* Initialize Port descriptor (PCIe port, Lane 6,
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* PCI Device Number 2, ...)
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*/
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{
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0,
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PCIE_ENGINE_DATA_INITIALIZER(PciePortEngine, 6, 6),
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PCIE_PORT_DATA_INITIALIZER_V2(PortEnabled, ChannelTypeExt6db,
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2, 4,
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HotplugDisabled,
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PcieGenMaxSupported,
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PcieGenMaxSupported,
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AspmDisabled, 0x04, 0)
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},
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/*
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* Initialize Port descriptor (PCIe port, Lane 5,
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* PCI Device Number 2, ...)
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*/
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{
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0,
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PCIE_ENGINE_DATA_INITIALIZER(PcieUnusedEngine, 5, 5),
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PCIE_PORT_DATA_INITIALIZER_V2(PortDisabled, ChannelTypeExt6db,
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2, 3,
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HotplugDisabled,
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PcieGenMaxSupported,
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PcieGenMaxSupported,
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AspmDisabled, 0x04, 0)
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},
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/*
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* Initialize Port descriptor (PCIe port, Lane4,
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* PCI Device Number 2, ...)
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*/
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{
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0,
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PCIE_ENGINE_DATA_INITIALIZER(PciePortEngine, 4, 4),
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PCIE_PORT_DATA_INITIALIZER_V2(PortEnabled, ChannelTypeExt6db,
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2, 2,
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HotplugDisabled,
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PcieGenMaxSupported,
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PcieGenMaxSupported,
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AspmDisabled, 0x06, 0)
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},
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/*
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* Initialize Port descriptor (PCIe port, Lanes 0-3,
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* PCI Device Number 2, ...)
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*/
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{
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/*
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* Descriptor flags !!!IMPORTANT!!! Terminate last element
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* of array
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*/
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DESCRIPTOR_TERMINATE_LIST,
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PCIE_ENGINE_DATA_INITIALIZER(PcieUnusedEngine, 0, 3),
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PCIE_PORT_DATA_INITIALIZER_V2(PortDisabled, ChannelTypeExt6db,
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2, 1,
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HotplugDisabled,
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PcieGenMaxSupported,
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PcieGenMaxSupported,
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AspmDisabled, 0x07, 0)
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},
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};
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static const PCIe_DDI_DESCRIPTOR DdiList[] = {
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/* DP0 */
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{
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0,
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PCIE_ENGINE_DATA_INITIALIZER(PcieDdiEngine, 16, 19),
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PCIE_DDI_DATA_INITIALIZER(ConnectorTypeDP, Aux1, Hdp1)
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},
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/* DP1 */
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{
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0,
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PCIE_ENGINE_DATA_INITIALIZER(PcieDdiEngine, 20, 23),
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PCIE_DDI_DATA_INITIALIZER(ConnectorTypeDP, Aux2, Hdp2)
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},
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/* DP2 */
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{
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DESCRIPTOR_TERMINATE_LIST,
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PCIE_ENGINE_DATA_INITIALIZER(PcieDdiEngine, 24, 27),
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PCIE_DDI_DATA_INITIALIZER(ConnectorTypeDP, Aux3, Hdp3)
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},
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};
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static const PCIe_COMPLEX_DESCRIPTOR PcieComplex = {
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.Flags = DESCRIPTOR_TERMINATE_LIST,
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.SocketId = 0,
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.PciePortList = (void *)PortList,
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.DdiLinkList = (void *)DdiList
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};
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/*---------------------------------------------------------------------------*/
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/**
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* OemCustomizeInitEarly
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*
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* Description:
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* This is the stub function will call the host environment through the
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* binary block interface (call-out port) to provide a user hook opportunity.
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*
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* Parameters:
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* @param[in] **PeiServices
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* @param[in] *InitEarly
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*
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* @retval VOID
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*
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**/
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/*---------------------------------------------------------------------------*/
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VOID OemCustomizeInitEarly(AMD_EARLY_PARAMS *InitEarly)
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{
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InitEarly->GnbConfig.PcieComplexList = (void *)&PcieComplex;
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}
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