8677a23d5b
src/arch/x86. Signed-off-by: Stefan Reinauer <stepan@coreboot.org> Acked-by: Patrick Georgi <patrick@georgi-clan.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6161 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
150 lines
4.2 KiB
ArmAsm
150 lines
4.2 KiB
ArmAsm
/*
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* This file is part of the coreboot project.
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*
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* Copyright (C) 1999 Ronald G. Minnich
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; version 2 of the License.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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*/
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#include <arch/rom_segs.h>
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.code16
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.globl _stage0
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_stage0:
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cli
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/* Save the BIST result. */
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movl %eax, %ebp;
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/* thanks to kmliu@sis.com.tw for this TLB fix */
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/* IMMEDIATELY invalidate the translation lookaside buffer (TLB) before
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* executing any further code. Even though paging is disabled we
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* could still get false address translations due to the TLB if we
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* didn't invalidate it.
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*/
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xorl %eax, %eax
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movl %eax, %cr3 /* Invalidate TLB. */
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/* Switch to protected mode. */
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/* NOTE: With GNU assembler version 2.15.94.0.2.2 (i386-redhat-linux)
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* using BFD version 2.15.94.0.2.2 20041220 this works fine without all
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* the ld hackery and other things. So leave it as is with this comment.
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*/
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data32 lgdt %cs:gdtptr
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movl %cr0, %eax
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andl $0x7FFAFFD1, %eax /* PG, AM, WP, NE, TS, EM, MP = 0 */
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orl $0x60000001, %eax /* CD, NW, PE = 1 */
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movl %eax, %cr0
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/* Restore BIST result. */
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movl %ebp, %eax
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// port80_post(0x23)
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/* Now we are in protected mode. Jump to a 32 bit code segment. */
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data32 ljmp $ROM_CODE_SEG, $protected_stage0
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/* I am leaving this weird jump in here in the event that future gas
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* bugs force it to be used.
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*/
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/* .byte 0x66 */
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.code32
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/* ljmp $ROM_CODE_SEG, $protected_stage0 */
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/* .code16 */
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.align 4
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.globl gdt16
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gdt16 = . - _stage0
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gdt16x:
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.word gdt16xend - gdt16x -1 /* Compute the table limit. */
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.long gdt16x
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.word 0
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/* selgdt 0x08, flat code segment */
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.word 0xffff, 0x0000
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.byte 0x00, 0x9b, 0xcf, 0x00
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/* selgdt 0x10, flat data segment */
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.word 0xffff, 0x0000
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.byte 0x00, 0x93, 0xcf, 0x00
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gdt16xend:
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/* From now on we are 32 bit. */
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.code32
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/* We have two gdts where we could have one. That is ok.
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*
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* Let's not worry about this -- optimizing gdt is pointless since
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* we're only in it for a little bit.
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*
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* Btw. note the trick below: The GDT points to ITSELF, and the first
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* good descriptor is at offset 8. So you word-align the table, and
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* then because you chose 8, you get a nice 64-bit aligned GDT entry,
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* which is good as this is the size of the entry.
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* Just in case you ever wonder why people do this.
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*/
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.align 4
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.globl gdtptr
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.globl gdt_limit
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gdt_limit = gdt_end - gdt - 1 /* Compute the table limit. */
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gdt:
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gdtptr:
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.word gdt_end - gdt -1 /* Compute the table limit. */
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.long gdt /* We know the offset. */
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.word 0
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/* selgdt 0x08, flat code segment */
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.word 0xffff, 0x0000
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.byte 0x00, 0x9b, 0xcf, 0x00
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/* selgdt 0x10, flat data segment */
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.word 0xffff, 0x0000
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.byte 0x00, 0x93, 0xcf, 0x00
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gdt_end:
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/* Reset vector. */
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/*
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* RVECTOR: Size of reset vector, default is 0x10.
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* RESRVED: Size of vpd code, default is 0xf0.
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* BOOTBLK: Size of bootblock code, default is 0x1f00 (8k-256b).
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*/
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SEGMENT_SIZE = 0x10000
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RVECTOR = 0x00010
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/* Due to YET ANOTHER BUG in GNU bintools, you can NOT have a code16 here.
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* I think we should leave it this way forever, as the bugs come and
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* go -- and come again.
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*
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* .code16
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* .section ".rom.text"
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*/
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.section ".reset", "ax"
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.globl _resetjump
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_resetjump:
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/* GNU bintools bugs again. This jumps to stage0 - 2. Sigh. */
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/* jmp _stage0 */
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.byte 0xe9
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.int _stage0 - ( . + 2 )
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/* Note: The above jump is hand coded to work around bugs in binutils.
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* 5 bytes are used for a 3 byte instruction. This works because x86
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* is little endian and allows us to use supported 32 bit relocations
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* instead of the weird 16 bit relocations that binutils does not
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* handle consistenly between versions because they are used so rarely.
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*/
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