89f04a6d68
used for fan control and thermal management on that board. Change-Id: I4e5c986ab6174b7a356d682e21732c46181af211 Signed-off-by: Sven Schnelle <svens@stackframe.org> Reviewed-on: http://review.coreboot.org/1167 Tested-by: build bot (Jenkins)
139 lines
3.5 KiB
Plaintext
139 lines
3.5 KiB
Plaintext
##
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## This file is part of the coreboot project.
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##
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## Copyright (C) 2007-2009 coresystems GmbH
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## Copyright (C) 2011 Sven Schnelle <svens@stackframe.org>
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##
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## This program is free software; you can redistribute it and/or
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## modify it under the terms of the GNU General Public License as
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## published by the Free Software Foundation; version 2 of
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## the License.
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##
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## This program is distributed in the hope that it will be useful,
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## but WITHOUT ANY WARRANTY; without even the implied warranty of
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## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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## GNU General Public License for more details.
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##
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## You should have received a copy of the GNU General Public License
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## along with this program; if not, write to the Free Software
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## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
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## MA 02110-1301 USA
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##
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chip northbridge/intel/i5000
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device lapic_cluster 0 on
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chip cpu/intel/socket_LGA771
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device lapic 0 on end
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end
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end
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device pci_domain 0 on
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device pci 00.0 on # Host bridge
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subsystemid 0x15d9 0x2017
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end
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device pci 02.0 on # PCIe bridge
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device pci 00.0 on
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device pci 00.0 on
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device pci 00.0 on end
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device pci 02.0 on end
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end
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device pci 02.0 on
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device pci 00.0 on
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device pci 02.0 on
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device pci 00.0 on end # e1000 #1
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device pci 00.1 on end # e1000 #2
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end
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end
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device pci 00.1 on end
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end
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end
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device pci 00.1 on end
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device pci 00.3 on end
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end
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device pci 03.0 on end
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device pci 04.0 on end
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device pci 05.0 on end
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device pci 06.0 on end
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device pci 07.0 on end
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device pci 10.0 on end # FBD
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device pci 10.1 on end # FBD
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device pci 10.2 on end # FBD
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device pci 11.0 on end # FBD reserved
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device pci 13.0 on end # FBD reserved
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device pci 15.0 on end # FBD
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device pci 16.0 on end # FBD
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chip southbridge/intel/i3100
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register "pirq_a_d" = "0x0b0b0b0b"
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register "pirq_e_h" = "0x80808080"
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register "sata_ports_implemented" = "0x3f"
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device pci 1c.0 on end # PCIe bridge
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device pci 1d.0 on end # USB UHCI
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device pci 1d.1 on end # USB UHCI
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device pci 1d.2 on end # USB UHCI
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device pci 1d.3 on end # USB UHCI
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device pci 1d.7 on end # USB2 EHCI
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device pci 1e.0 on
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device pci 01.0 on
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end
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end
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device pci 1f.0 on # PCI-LPC bridge
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subsystemid 0x15d9 0x2009
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chip superio/winbond/w83627hf
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device pnp 2e.0 off end # FDC
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device pnp 2e.1 on # Parallel Port
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io 0x60 = 0x378
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irq 0x70 = 7
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end
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device pnp 2e.2 on # Serial Port 1
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io 0x60 = 0x3f8
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irq 0x70 = 4
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end
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device pnp 2e.3 off end
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device pnp 2e.5 on # KBC
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io 0x60 = 0x60
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io 0x62 = 0x64
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irq 0x70 = 1
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irq 0x72 = 12
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end
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device pnp 2e.6 off end # CIR
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device pnp 2e.7 off end # Game port / MIDI
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device pnp 2e.8 off end # GPIO2
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device pnp 2e.9 on end # GPIO3
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device pnp 2e.a on end # ACPI
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device pnp 2e.b off end # HWMON
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end
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end
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device pci 1f.1 off end # IDE
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device pci 1f.2 on end # SATA
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device pci 1f.3 on
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chip drivers/i2c/w83793
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register "mfc" = "0x28"
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register "fanin" = "0x1f"
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register "peci_agent_conf" = "0x33"
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register "tcase0" = "0x5e"
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register "tcase1" = "0x5e"
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register "tcase2" = "0x5e"
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register "tcase3" = "0x5e"
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register "tr_enable" = "0x01"
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register "critical_temperature" = "0x7f"
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register "td1_fan_select" = "0x01"
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register "td2_fan_select" = "0x01"
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register "td3_fan_select" = "0x01"
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register "td4_fan_select" = "0x01"
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device i2c 0x2f on end
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end
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end # SMBUS
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end
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end
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end
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