Subrata Banik 89f6d6079e skylake/devicetree: Add LPC EC decode range ...

Define LPC decode ranges for EC communication.

BUG=chrome-os-partner:55357
BRANCH=none
TEST=Built and boot kunimitsu to ensure no EC timeout error

Change-Id: Idefdd79e67e89a794195c6821fee16550d1eda53
Signed-off-by: Subrata Banik <subrata.banik@intel.com>
Reviewed-on: https://review.coreboot.org/15898
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@chromium.org>

2016-07-28 05:17:56 +02:00

..

acpi

arch/x86: provide common Intel ACPI hardware definitions

2016-07-15 08:31:21 +02:00

arch

arch/x86: Add bootblock and postcar support for SOC MTRR access

2016-07-27 13:50:39 +02:00

commonlib

cbmem: share additional time stamps IDs

2016-07-20 22:09:24 +02:00

console

skylake/mainboard: Define mainboard hook in bootblock

2016-07-28 05:17:03 +02:00

cpu

cpu/x86: Support CPUs without rdmsr/wrmsr instructions

2016-07-27 13:50:11 +02:00

device

bootmode: Get rid of CONFIG_BOOTMODE_STRAPS

2016-07-28 00:36:22 +02:00

drivers

i2c/ww_ring: Add ww_ring files to ramstage

2016-07-28 00:38:09 +02:00

ec

skylake/mainboard: Define mainboard hook in bootblock

2016-07-28 05:17:03 +02:00

include

bootmode: Get rid of CONFIG_BOOTMODE_STRAPS

2016-07-28 00:36:22 +02:00

lib

skylake/mainboard: Define mainboard hook in bootblock

2016-07-28 05:17:03 +02:00

mainboard

skylake/devicetree: Add LPC EC decode range

2016-07-28 05:17:56 +02:00

northbridge

bootmode: Get rid of CONFIG_BOOTMODE_STRAPS

2016-07-28 00:36:22 +02:00

soc

soc/intel/skylake: Add C entry bootblock support

2016-07-28 05:15:58 +02:00

southbridge

bootmode: Get rid of CONFIG_BOOTMODE_STRAPS

2016-07-28 00:36:22 +02:00

superio

sio/winbond/w83667hg-a: Add pinmux defines for UART B

2016-05-29 19:34:54 +02:00

vboot

bootmode: Get rid of CONFIG_BOOTMODE_STRAPS

2016-07-28 00:36:22 +02:00

vendorcode

chromeos/gnvs: Clean up use of vboot handoff

2016-07-28 00:40:20 +02:00

Kconfig

bootmode: Get rid of CONFIG_BOOTMODE_STRAPS

2016-07-28 00:36:22 +02:00