8a3453fc86
Done with sed and God Lines. Only done for C-like code for now. Change-Id: I38eaffa391ed5971217ffad74a312b1641e431c9 Signed-off-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/40051 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
86 lines
2.4 KiB
C
86 lines
2.4 KiB
C
/* SPDX-License-Identifier: GPL-2.0-only */
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/* This file is part of the coreboot project. */
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#ifndef _I2C_PCF8523_H_
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#define _I2C_PCF8523_H_
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/* The address of this RTC is fixed. */
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#define PCF8523_SLAVE_ADR 0x68
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/* Register layout */
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#define CTRL_REG_1 0x00
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#define STOP_BIT (1 << 5)
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#define CAP_SEL (1 << 7)
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#define CTRL_REG_2 0x01
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#define CTRL_REG_3 0x02
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#define PM_MASK (7 << 5)
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#define SECOND_REG 0x03
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#define OS_BIT (1 << 7)
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#define MINUTE_REG 0x04
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#define HOUR_REG 0x05
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#define DAY_REG 0x06
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#define WEEKDAY_REG 0x07
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#define MONTH_REG 0x08
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#define YEAR_REG 0x09
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#define ALARM_MINUTE_REG 0x0A
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#define ALARM_HOUR_REG 0x0B
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#define ALARM_DAY_REG 0x0C
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#define ALARM_WEEKDAY_REG 0x0D
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#define OFFSET_REG 0x0E
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#define TMR_CLKOUT_REG 0x0F
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#define COF_MASK 0x38
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#define TMR_A_FREQ_REG 0x10
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#define TMR_A_REG 0x11
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#define TMR_B_FREQ_REG 0x12
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#define TMR_B_REG 0x13
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/* Define used capacitor modes */
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/* Valid for parameter cap_sel */
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#define CAP_SEL_7_PF 0x00
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#define CAP_SEL_12_PF 0x01
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/* Define supported power modes */
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/* Valid for parameter power_mode */
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#define PM_BAT_SW_STD_LOW_DETECT 0x00
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#define PM_BAT_SW_DIRECT_LOW_DETECT 0x01
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#define PM_BAT_SW_OFF_LOW_DETECT 0x02
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#define PM_BAT_SW_STD_LOW_DETECT_OFF 0x04
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#define PM_BAT_SW_DIRECT_LOW_DETECT_OFF 0x05
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#define PM_BAT_SW_OFF_LOW_DETECT_OFF 0x07
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/* Define CLKOUT frequency divider values */
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/* Valid for parameter cof_selection */
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#define COF_32768_HZ 0x00
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#define COF_16384_HZ 0x01
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#define COF_8192_HZ 0x02
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#define COF_4096_HZ 0x03
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#define COF_1024_HZ 0x04
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#define COF_32_HZ 0x05
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#define COF_1_HZ 0x06
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#define COF_OFF 0x07
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/* Define timer A & B set up values */
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/* Valid for parameter tmrA_prescaler and tmrB_prescaler */
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#define TMR_CLK_4096_HZ 0x00
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#define TMR_CLK_64_HZ 0x01
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#define TMR_CLK_1_HZ 0x02
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#define TMR_CLK_1_60_HZ 0x03
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#define TMR_CLK_1_3600_HZ 0x07
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/* Valid for parameter tmrA_mode and tmrB_mode */
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#define TMR_DISABLED 0x00
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#define TMR_A_MODE_COUNTDOWN 0x01
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#define TMR_A_MODE_WATCHDOG 0x02
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#define TMR_B_MODE_ENABLED 0x01
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/* Valid for parameter tmrB_pulse_cfg */
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#define TMR_B_PULSE_WIDTH_46_MS 0x00
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#define TMR_B_PULSE_WIDTH_62_MS 0x01
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#define TMR_B_PULSE_WIDTH_78_MS 0x02
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#define TMR_B_PULSE_WIDTH_93_MS 0x03
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#define TMR_B_PULSE_WIDTH_125_MS 0x04
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#define TMR_B_PULSE_WIDTH_156_MS 0x05
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#define TMR_B_PULSE_WIDTH_187_MS 0x06
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#define TMR_B_PULSE_WIDTH_218_MS 0x07
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#endif /* _I2C_PCF8523_H_ */
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