8a85a84fac
Expand NO_EARLY_BOOTBLOCK_POSTCODES to all of the early assembly code in bootblock. BUG=b:191370340 TEST: Build with & without the option enabled Signed-off-by: Martin Roth <martinroth@chromium.org> Change-Id: Idb4a96820d5c391fc17a0f0dcccd519d4881b78c Reviewed-on: https://review.coreboot.org/c/coreboot/+/55731 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Raul Rangel <rrangel@chromium.org> Reviewed-by: Karthik Ramasubramanian <kramasub@google.com> Reviewed-by: Nico Huber <nico.h@gmx.de> Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
79 lines
1.5 KiB
ArmAsm
79 lines
1.5 KiB
ArmAsm
/* SPDX-License-Identifier: GPL-2.0-or-later */
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/* For starting coreboot in protected mode */
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/*
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* This is the modern bootblock. It prepares the system for C environment runtime
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* setup. The actual setup is done by hardware-specific code.
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*
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* It provides a bootflow similar to other architectures, and thus is considered
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* to be the modern approach.
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*
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*/
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#include <arch/rom_segs.h>
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#include <cpu/x86/cr.h>
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#include <cpu/x86/post_code.h>
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.section .init, "ax", @progbits
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.code32
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/*
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* When we come here we are in protected mode.
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* NOTE aligned to 4 so that we are sure that the prefetch
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* cache will be reloaded.
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*/
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.align 4
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.globl bootblock_protected_mode_entry
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bootblock_protected_mode_entry:
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/* Save the BIST value */
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movl %eax, %ebp
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post_code(POST_ENTER_PROTECTED_MODE)
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movw $ROM_DATA_SEG, %ax
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movw %ax, %ds
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movw %ax, %es
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movw %ax, %ss
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movw %ax, %fs
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movw %ax, %gs
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/* Restore the BIST value to %eax */
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movl %ebp, %eax
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#if CONFIG(BOOTBLOCK_DEBUG_SPINLOOP)
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/* Wait for a JTAG debugger to break in and set EBX non-zero */
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xor %ebx, %ebx
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debug_spinloop:
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cmp $0, %ebx
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jz debug_spinloop
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#endif
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#if !CONFIG(USE_MARCH_586)
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/* MMX registers required here */
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/* BIST result in eax */
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movd %eax, %mm0
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__timestamp:
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/* Get an early timestamp */
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rdtsc
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movd %eax, %mm1
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movd %edx, %mm2
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#endif
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#if CONFIG(SSE)
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enable_sse:
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mov %cr4, %eax
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or $CR4_OSFXSR, %ax
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mov %eax, %cr4
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#endif /* CONFIG(SSE) */
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/* We're done. Now it's up to platform-specific code */
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jmp bootblock_pre_c_entry
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