8aa50730aa
Use of device_t has been abandoned in ramstage. Change-Id: Iefef4e72f1012c8a6edbb9e5c94bdc162bed93d0 Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/26256 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de>
83 lines
2.3 KiB
C
83 lines
2.3 KiB
C
/*
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* This file is part of the coreboot project.
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*
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* Copyright (C) 2012 secunet Security Networks AG
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* (Written by Nico Huber <nico.huber@secunet.com> for secunet)
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; version 2 of
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* the License.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#include <arch/io.h>
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#include <device/device.h>
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#include <device/pci.h>
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#include <device/pci_ids.h>
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#include "i82801ix.h"
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static void thermal_init(struct device *dev)
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{
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if (LPC_IS_MOBILE(dev_find_slot(0, PCI_DEVFN(0x1f, 0))))
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return;
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u8 reg8;
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u32 reg32;
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pci_write_config32(dev, 0x10, (uintptr_t)DEFAULT_TBAR);
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reg32 = pci_read_config32(dev, 0x04);
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pci_write_config32(dev, 0x04, reg32 | (1 << 1));
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write32(DEFAULT_TBAR + 0x04, 0); /* Clear thermal trip points. */
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write32(DEFAULT_TBAR + 0x44, 0);
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write8(DEFAULT_TBAR + 0x01, 0xba); /* Enable sensor 0 + 1. */
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write8(DEFAULT_TBAR + 0x41, 0xba);
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reg8 = read8(DEFAULT_TBAR + 0x08); /* Lock thermal registers. */
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write8(DEFAULT_TBAR + 0x08, reg8 | (1 << 7));
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reg8 = read8(DEFAULT_TBAR + 0x48);
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write8(DEFAULT_TBAR + 0x48, reg8 | (1 << 7));
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reg32 = pci_read_config32(dev, 0x04);
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pci_write_config32(dev, 0x04, reg32 & ~(1 << 1));
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pci_write_config32(dev, 0x10, 0);
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}
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static void thermal_set_subsystem(struct device *dev, unsigned vendor,
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unsigned device)
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{
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if (!vendor || !device) {
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pci_write_config32(dev, PCI_SUBSYSTEM_VENDOR_ID,
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pci_read_config32(dev, PCI_VENDOR_ID));
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} else {
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pci_write_config32(dev, PCI_SUBSYSTEM_VENDOR_ID,
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((device & 0xffff) << 16) | (vendor & 0xffff));
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}
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}
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static struct pci_operations thermal_pci_ops = {
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.set_subsystem = thermal_set_subsystem,
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};
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static struct device_operations device_ops = {
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.read_resources = pci_dev_read_resources,
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.set_resources = pci_dev_set_resources,
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.enable_resources = pci_dev_enable_resources,
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.init = thermal_init,
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.scan_bus = 0,
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.ops_pci = &thermal_pci_ops,
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};
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static const struct pci_driver ich9_thermal __pci_driver = {
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.ops = &device_ops,
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.vendor = PCI_VENDOR_ID_INTEL,
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.device = 0x2932,
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};
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