8b56c8c6b2
Currently it's not possible to add multiple graphics driver into one coreboot image. This patch series will fix this issue by providing a single API that multiple graphics driver can use. This is required for platforms that have two graphic cards, but different graphic drivers, like Intel+Aspeed on server platforms or Intel+Nvidia on consumer notebooks. The goal is to remove duplicated fill_fb_framebuffer(), the advertisment of multiple indepent framebuffers in coreboot tables, and better runtime/build time graphic configuration options. Replace set_vbe_mode_info_valid with fb_add_framebuffer_info or fb_new_framebuffer_info_from_edid. Change-Id: I95d1d62385a201c68c6c2527c023ad2292a235c5 Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/39004 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Hung-Te Lin <hungte@chromium.org>
130 lines
3.3 KiB
C
130 lines
3.3 KiB
C
/* SPDX-License-Identifier: GPL-2.0-only */
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#include <arch/cache.h>
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#include <device/mmio.h>
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#include <console/console.h>
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#include <device/device.h>
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#include <delay.h>
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#include <edid.h>
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#include <gpio.h>
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#include <string.h>
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#include <soc/addressmap.h>
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#include <soc/clock.h>
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#include <soc/display.h>
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#include <soc/edp.h>
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#include <soc/hdmi.h>
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#include <soc/gpio.h>
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#include <soc/grf.h>
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#include <soc/soc.h>
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#include <soc/vop.h>
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#include <framebuffer_info.h>
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#include "chip.h"
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void rk_display_init(struct device *dev, u32 lcdbase, unsigned long fb_size)
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{
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struct edid edid;
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uint32_t val;
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struct soc_rockchip_rk3288_config *conf = dev->chip_info;
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uint32_t lower = ALIGN_DOWN(lcdbase, MiB);
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uint32_t upper = ALIGN_UP(lcdbase + fb_size, MiB);
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enum vop_modes detected_mode = VOP_MODE_UNKNOWN;
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printk(BIOS_SPEW, "LCD framebuffer @%p\n", (void *)(lcdbase));
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memset((void *)lcdbase, 0, fb_size); /* clear the framebuffer */
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dcache_clean_invalidate_by_mva((void *)lower, upper - lower);
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mmu_config_range(lower / MiB, (upper - lower) / MiB, DCACHE_OFF);
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switch (conf->vop_mode) {
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case VOP_MODE_NONE:
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return;
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case VOP_MODE_AUTO_DETECT:
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/* try EDP first, then HDMI */
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case VOP_MODE_EDP:
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printk(BIOS_DEBUG, "Attempting to setup EDP display.\n");
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rkclk_configure_edp();
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rkclk_configure_vop_aclk(conf->vop_id, 192 * MHz);
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/* grf_edp_ref_clk_sel: from internal 24MHz or 27MHz clock */
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write32(&rk3288_grf->soc_con12, RK_SETBITS(1 << 4));
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/* select epd signal from vop0 or vop1 */
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val = (conf->vop_id == 1) ? RK_SETBITS(1 << 5) :
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RK_CLRBITS(1 << 5);
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write32(&rk3288_grf->soc_con6, val);
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rk_edp_init();
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if (rk_edp_get_edid(&edid) == 0) {
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detected_mode = VOP_MODE_EDP;
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break;
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} else {
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printk(BIOS_WARNING, "Cannot get EDID from EDP.\n");
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if (conf->vop_mode == VOP_MODE_EDP)
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return;
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}
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/* fall thru */
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case VOP_MODE_HDMI:
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printk(BIOS_DEBUG, "Attempting to setup HDMI display.\n");
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rkclk_configure_hdmi();
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rkclk_configure_vop_aclk(conf->vop_id, 384 * MHz);
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rk_hdmi_init(conf->vop_id);
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if (rk_hdmi_get_edid(&edid) == 0) {
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detected_mode = VOP_MODE_HDMI;
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break;
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} else {
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printk(BIOS_WARNING, "Cannot get EDID from HDMI.\n");
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if (conf->vop_mode == VOP_MODE_HDMI)
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return;
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}
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/* fall thru */
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default:
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printk(BIOS_WARNING, "Cannot read any edid info, aborting.\n");
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return;
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}
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if (rkclk_configure_vop_dclk(conf->vop_id, edid.mode.pixel_clock * KHz)) {
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printk(BIOS_WARNING, "config vop err\n");
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return;
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}
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edid_set_framebuffer_bits_per_pixel(&edid,
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conf->framebuffer_bits_per_pixel, 0);
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rkvop_mode_set(conf->vop_id, &edid, detected_mode);
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rkvop_prepare(conf->vop_id, &edid);
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rkvop_enable(conf->vop_id, lcdbase);
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switch (detected_mode) {
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case VOP_MODE_HDMI:
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if (rk_hdmi_enable(&edid)) {
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printk(BIOS_WARNING, "hdmi enable err\n");
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return;
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}
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/*
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* HACK: if we do remove this delay, HDMI TV may not show
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* anythings. So we make an delay here, ensure TV have
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* enough time to respond.
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*/
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mdelay(2000);
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break;
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case VOP_MODE_EDP:
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default:
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if (rk_edp_prepare()) {
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printk(BIOS_WARNING, "edp prepare err\n");
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return;
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}
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if (rk_edp_enable()) {
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printk(BIOS_WARNING, "edp enable err\n");
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return;
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}
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mainboard_power_on_backlight();
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break;
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}
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fb_new_framebuffer_info_from_edid(&edid, (uintptr_t)lcdbase);
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}
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