Clang builds (bootblock: 20800 bytes) are slightly larger than GCC builds (bootblock: 18688 bytes) so increase the size of both bootblock and romstage. The technical reference manual mentions no upper limit to the size of the bootblock in the TI header so increasing the bootblock size is allowed. To be able to link the clang bootblock increase it from 20K to 22K. Change-Id: I8719bc3728d4cc8dba8d939cc154c3fc0884d47b Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-on: https://review.coreboot.org/c/coreboot/+/70160 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de>
35 lines
484 B
Plaintext
35 lines
484 B
Plaintext
/* SPDX-License-Identifier: GPL-2.0-only */
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#include <memlayout.h>
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#include <arch/header.ld>
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SECTIONS
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{
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SRAM_START(0x402f0400)
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BOOTBLOCK(., 22K)
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FMAP_CACHE(., 2K)
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CBFS_MCACHE(., 8K)
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ROMSTAGE(., 42K)
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PRERAM_CBFS_CACHE(., 20K)
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STACK(., 4K)
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. = ALIGN(16K);
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TTB(., 16K)
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SRAM_END(0x40310000)
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DRAM_START(0x80000000)
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RAMSTAGE(0x80000000, 2M)
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POSTRAM_CBFS_CACHE(0x80200000, 32M)
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#ifdef OMAP_HEADER
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.header : {
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*(.header);
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} : to_load
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/DISCARD/ : {
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*(*)
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}
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#endif
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}
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