8cbd569f74
This adds Cavium CN81xx SoC and SFF EVB files. Code is based off of Cavium's Octeon-TX SDK: https://github.com/Cavium-Open-Source-Distributions/OCTEON-TX-SDK BDK coreboot differences: bootblock: - Get rid of BDK header - Add Kconfig for link address - Move CAR setup code into assembly - Move unaligned memory access enable into assembly - Implement custom bootblock entry function - Add CLIB and CSIB blobs romstage: - Use minimal DRAM init only devicetree: - Convert FTD to static C file containing key value pairs Tested on CN81xx: - Boots to payload - Tested with GNU/Linux 4.16.3 - All hardware is usable (after applying additional commits) Implemented in future commits: - Vboot integration - MMU suuport - L2 Cache handling - ATF from external repo - Devicetree patching - Extended DRAM testing - UART init Not working: - Booting a payload - Booting upstream ATF TODO: - Configuration straps Change-Id: I47b4412d29203b45aee49bfa026c1d86ef7ce688 Signed-off-by: David Hendricks <dhendricks@fb.com> Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com> Reviewed-on: https://review.coreboot.org/23037 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: David Hendricks <david.hendricks@gmail.com>
95 lines
2.9 KiB
C
95 lines
2.9 KiB
C
/*
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* This file is part of the coreboot project.
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*
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* Copyright 2018 Facebook, Inc.
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* Copyright 2003-2017 Cavium Inc. <support@cavium.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; version 2 of the License.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* Derived from Cavium's BSD-3 Clause OCTEONTX-SDK-6.2.0.
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*/
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#include <console/console.h>
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#include <soc/sdram.h>
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#include <libbdk-arch/bdk-warn.h>
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#include <libbdk-arch/bdk-csrs-rst.h>
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#include <libbdk-boot/bdk-watchdog.h>
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#include <libbdk-dram/bdk-dram-config.h>
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#include <libbdk-dram/bdk-dram-test.h>
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#include <libbdk-hal/bdk-config.h>
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#include <libbdk-hal/bdk-utils.h>
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#include <libbdk-hal/bdk-l2c.h>
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#include <libdram/libdram-config.h>
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size_t sdram_size_mb(void)
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{
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return bdk_dram_get_size_mbytes(0);
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}
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/* based on bdk_boot_dram() */
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void sdram_init(void)
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{
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printk(BIOS_DEBUG, "Initializing DRAM\n");
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/**
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* FIXME: second arg is actually a desired frequency if set (the
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* function usually obtains frequency via the config). That might
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* be useful if FDT or u-boot env is too cumbersome.
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*/
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int mbytes = bdk_dram_config(0, 0);
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if (mbytes < 0) {
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bdk_error("N0: Failed DRAM init\n");
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die("DRAM INIT FAILED !\n");
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}
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/* Poke the watchdog */
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bdk_watchdog_poke();
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/* Report DRAM status */
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printf("N0: DRAM:%s\n", bdk_dram_get_info_string(0));
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/* See if we should test this node's DRAM during boot */
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int test_dram = bdk_config_get_int(BDK_CONFIG_DRAM_BOOT_TEST, 0);
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if (test_dram) {
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/* Run the address test to make sure DRAM works */
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if (bdk_dram_test(13, 0, 0x10000000000ull, BDK_DRAM_TEST_NO_STATS | (1<<0))) {
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/**
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* FIXME(dhendrix): This should be handled by mainboard code since we
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* don't necessarily have a BMC to report to. Also, we need to figure out
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* if we need to keep going as to avoid getting into a boot loop.
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*/
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// bdk_boot_status(BDK_BOOT_STATUS_REQUEST_POWER_CYCLE);
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printk(BIOS_ERR, "%s: Failed DRAM test.\n", __func__);
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}
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bdk_watchdog_poke();
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/* Put other node core back in reset */
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if (0 != bdk_numa_master())
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BDK_CSR_WRITE(0, BDK_RST_PP_RESET, -1);
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/* Clear DRAM */
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uint64_t skip = 0;
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if (0 == bdk_numa_master())
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skip = bdk_dram_get_top_of_bdk();
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void *base = bdk_phys_to_ptr(bdk_numa_get_address(0, skip));
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bdk_zero_memory(base, ((uint64_t)mbytes << 20) - skip);
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bdk_watchdog_poke();
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}
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/* Unlock L2 now that DRAM works */
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if (0 == bdk_numa_master()) {
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uint64_t l2_size = bdk_l2c_get_cache_size_bytes(0);
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BDK_TRACE(INIT, "Unlocking L2\n");
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bdk_l2c_unlock_mem_region(0, 0, l2_size);
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bdk_watchdog_poke();
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}
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printk(BIOS_INFO, "SDRAM initialization finished.\n");
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}
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