8dcadc9189
Change-Id: I5ae2a2da1994fcc587540586d7404ebf18eb2ca0 Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/c/coreboot/+/39928 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
32 lines
802 B
C
32 lines
802 B
C
/* SPDX-License-Identifier: GPL-2.0-or-later */
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/* This file is part of the coreboot project. */
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#ifndef SUPERIO_FINTEK_F81216H_H
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#define SUPERIO_FINTEK_F81216H_H
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#include <device/pnp_type.h>
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/* Logical Device Numbers (LDN). */
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#define F81216H_SP1 0x00 /* UART1 (+CIR mode) */
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#define F81216H_SP2 0x01 /* UART2 */
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#define F81216H_SP3 0x02 /* UART3 */
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#define F81216H_SP4 0x03 /* UART4 */
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#define F81216H_WDT 0x08 /* WDT */
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/**
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* The PNP config entry key is parameterised
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* by two bits on this Super I/O with 0x77 as
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* the default key.
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* See page 17 of data sheet for details.
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*/
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typedef enum {
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MODE_6767 = 0x67,
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MODE_7777 = 0x77,
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MODE_8787 = 0x87,
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MODE_A0A0 = 0xA0,
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} mode_key;
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void f81216h_enable_serial(pnp_devfn_t dev, u16 iobase, mode_key k);
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#endif /* SUPERIO_FINTEK_F81216H_H */
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